BibTeX
@MISC{Erez_virtualizedand,
author = {Mattan Erez},
title = {Virtualized and Flexible ECC for Main Memory},
year = {}
}
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Abstract
We present a general scheme for virtualizing main memory errorcorrection mechanisms, which map redundant information needed to correct errors into the memory namespace itself. We rely on this basic idea, which increases flexibility to increase error protection capabilities, improve power efficiency, and reduce system cost; with only small performance overheads. We augment the virtualmemorysystemarchitecturetodetachthephysicalmappingof data fromthe physical mapping ofitsassociatedECCinformation. We then use this mechanism todevelop two-tierederror protection techniques that separate the process of detecting errors from the rare need to also correct errors, and thus save energy. We describe how to provide strong chipkill and double-chip kill protection using existing DRAM and packaging technology. We show how to maintain access granularity and redundancy overheads, even when using ×8 DRAM chips. We also evaluate error correction for systems that donot use ECCDIMMs. Overall, analysis of demanding SPEC CPU 2006 and PARSEC benchmarks indicates that performance overhead is only 1 % with ECC DIMMs and less than 10% usingstandardNon-ECCDIMMconfigurations,thatDRAMpower savings can be as high as 27%, and that the system energy-delay product isimproved by 12 % on average.
Keyphrases
main memory flexible ecc redundant information packaging technology power efficiency two-tierederror protection technique rare need correct error main memory errorcorrection mechanism system cost access granularity physical mapping ofitsassociatedeccinformation performance overhead error protection capability strong chipkill system energy-delay product general scheme ecc dimms error correction basic idea small performance overhead double-chip kill protection spec cpu redundancy overhead memory namespace dram chip
