Efficient Timed Reachability Analysis using Clock Difference Diagrams (1998)
| Venue: | IN PROCEEDINGS OF THE 12TH INT. CONF. ON COMPUTER AIDED VERI |
| Citations: | 48 - 7 self |
BibTeX
@INPROCEEDINGS{Behrmann98efficienttimed,
author = {Gerd Behrmann and Kim G. Larsen and Justin Pearson and Carsten Weise and Wang Yi},
title = {Efficient Timed Reachability Analysis using Clock Difference Diagrams},
booktitle = {IN PROCEEDINGS OF THE 12TH INT. CONF. ON COMPUTER AIDED VERI},
year = {1998},
pages = {341--353},
publisher = {Springer-Verlag}
}
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Abstract
One of the major problems in applying automatic verification tools to industrial-size systems is the excessive amount of memory required during the state-space exploration of a model. In the setting of real-time, this problem of state-explosion requires extra attention as information must be kept not only on the discrete control structure but also on the values of continuous clock variables. In this
