Synthesis and Verification of Digital Circuits using Functional Simulation and Boolean Satisfiability (2008)
BibTeX
@MISC{Plaza08synthesisand,
author = {Stephen M. Plaza},
title = {Synthesis and Verification of Digital Circuits using Functional Simulation and Boolean Satisfiability},
year = {2008}
}
OpenURL
Abstract
for inspiring me to consider various fields of research and providing feedback on my projects and papers. I also want to thank my defense committee for their comments and insights: Professor John Hayes, Professor Karem Sakallah, and Professor Dennis Sylvester. I would like to thank Professor David Kieras for enhancing my knowledge and appreciation for computer programming and providing invaluable advice. Over the years, I have been fortunate to know and work with several wonderful students. I have collaborated extensively with Kai-hui Chang and Smita Krishnaswamy and have enjoyed numerous research discussions with them and have benefited from their insights. I would like to thank Ian Kountanis and Zaher Andraus for our many fun discussions on parallel SAT. I also appreciate the time spent collaborating with Kypros Constantinides and Jason Blome. Although I have not formally collaborated with Ilya Wagner, I have enjoyed numerous discussions with him during my doctoral studies. I also thank my office mates Jarrod Roy, Jin Hu, and Hector Garcia. Without my family and friends I would never have come this far. I would like to thank Geoff Blake and Smita Krishnaswamy, who have been both good friends and colleagues







