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Evaluation of Architectural Support for Global Address-Based Communication in Large-Scale Parallel Machines (1996)
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| Venue: | IN PROC. OF THE 7TH INT. CONF. ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS (ASPLOS |
| Citations: | 14 - 4 self |
BibTeX
@INPROCEEDINGS{Krishnamurthy96evaluationof,
author = {Arvind Krishnamurthy and Klaus E. Schauser and Chris J. Scheiman and Randolph Y. Wang and David E. Culler and Katherine Yelick},
title = {Evaluation of Architectural Support for Global Address-Based Communication in Large-Scale Parallel Machines},
booktitle = {IN PROC. OF THE 7TH INT. CONF. ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS (ASPLOS},
year = {1996},
publisher = {}
}
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Abstract
Large-scale parallel machines are incorporating increasingly sophisticated architectural support for user-level messaging and global memory access. We provide a systematic evaluation of a broad spectrum of current design alternatives based on our implementations of a global address language on the Thinking Machines CM-5, Intel Paragon, Meiko CS-2, Cray T3D, and Berkeley NOW. This evaluation includes a range of compilation strategies that make varying use of the network processor; each is optimized for the target architecture and the particular strategy. We analyze a family of interacting issues that determine the performance tradeo s in each implementation, quantify the resulting latency, overhead, and bandwidth of the global access operations, and demonstrate the e ects on application performance.
Keyphrases
large-scale parallel machine global address-based communication architectural support global memory access resulting latency intel paragon compilation strategy particular strategy global access operation broad spectrum target architecture thinking machine cm-5 application performance global address language systematic evaluation network processor sophisticated architectural support current design alternative meiko cs-2 cray t3d user-level messaging performance tradeo
