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Data Prefetch Mechanisms (2000)
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BibTeX
@MISC{Vanderwiel00dataprefetch,
author = {Steven P. Vanderwiel and David J. Lilja},
title = { Data Prefetch Mechanisms},
year = {2000}
}
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Abstract
The expanding gap between microprocessor and DRAM performance has necessitated the use of increasingly aggressive techniques designed to reduce or hide the latency of main memory access. Although large cache hierarchies have proven to be effective in reducing this latency for the most frequently used data, it is still not uncommon for many programs to spend more than half their run times stalled on memory requests. Data prefetching has been proposed as a technique for hiding the access latency of data referencing patterns that defeat caching strategies. Rather than waiting for a cache miss to initiate a memory fetch, data prefetching anticipates such misses and issues a fetch to the memory system in advance of the actual memory reference. To be effective, prefetching must be implemented in such a way that prefetches are timely, useful, and introduce little overhead. Secondary effects such as cache pollution and increased memory bandwidth requirements must also be taken into consideration. Despite these obstacles, prefetching has the potential to significantly improve overall program execution time by overlapping computation with memory accesses. Prefetching
Keyphrases
data prefetch mechanism memory fetch actual memory reference main memory access anticipates miss aggressive technique secondary effect access latency memory bandwidth requirement data prefetching dram performance cache pollution memory access run time overall program execution time memory request cache miss large cache hierarchy little overhead many program memory system
