Abstract

Embedded computer systems are characterized by the presence ofadedicated processor and the software that runs on it. Power constraints are increasingly becoming the critical component of the design speci cation of these systems. At present, however, power analysis tools can only be applied at the lower levels of the design { the circuit or gate level. It is either impractical or impossible to use the lower level tools to estimate the power cost of the software component of the system. This paper describes the rst systematic attempt to model this power cost. A power analysis technique is developed that has been applied to two commercial microprocessors -- Intel 486DX2 and Fujitsu SPARClite 934. This technique can be employed to evaluate the power costofembedded software and also be used tosearch the design space in software power optimization.

Citations