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Energy-Aware Mapping for Tile-based NoC Architectures under Performance Constraints (2003)
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BibTeX
@MISC{Hu03energy-awaremapping,
author = {Jingcao Hu and Radu Marculescu},
title = {Energy-Aware Mapping for Tile-based NoC Architectures under Performance Constraints},
year = {2003}
}
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Abstract
In this paper, we present an algorithm which automatically maps the IPs/cores onto a generic regular Network on Chip (NoC) architecture such that the total communication energy is minimized. At the same time, the performance of the mapped system is guaranteed to satisfy the specified constraints through bandwidth reservation. As the main contribution, we first formulate the problem of energy-aware mapping, in a topological sense, and then propose an efficient branch-and-bound algorithm to solve it. Experimental results show that the proposed algorithm is very fast and robust, and significant energy savings can be achieved. For instance, for a complex video/audio SoC design, on average, 60.4% energy savings have been observed compared to an ad-hoc implementation.
Keyphrases
energy-aware mapping tile-based noc architecture performance constraint main contribution energy saving bandwidth reservation mapped system ad-hoc implementation topological sense efficient branch-and-bound algorithm specified constraint complex video audio soc design significant energy saving experimental result total communication energy generic regular network
