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An accurate and fine grain instruction-level energy model supporting software optimizations (2001)
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| Venue: | in Proc. Int. Wkshp Power & Timing Modeling, Optimization & Simulation (PATMOS |
| Citations: | 63 - 17 self |
BibTeX
@INPROCEEDINGS{Steinke01anaccurate,
author = {Stefan Steinke and Markus Knauer and Lars Wehmeyer and Peter Marwedel},
title = {An accurate and fine grain instruction-level energy model supporting software optimizations},
booktitle = {in Proc. Int. Wkshp Power & Timing Modeling, Optimization & Simulation (PATMOS},
year = {2001}
}
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Abstract
Abstract. Power aware compilers have been under research during the last few years. However, there is still a need for accurate energy models for supporting software optimizations. In this paper we present a new energy model on the instruction level. As an addition to former models, the bit toggling on internal and external busses as well as accesses to off-chip memories are considered. To determine the characteristics, a measuring method is presented which can be used to establish the energy model without detailed knowledge of the internal processor structures. Finally, the proposed energy model is established for the ARM7TDMI RISC processor. 1
Keyphrases
software optimization fine grain instruction-level energy model energy model off-chip memory detailed knowledge former model arm7tdmi risc processor internal processor structure new energy model instruction level accurate energy model last year measuring method power aware compiler external bus
