Optimizing Sequential Verification by Retiming Transformations (2000)
by
Gianpiero Cabodi
,
Stefano Quer
,
Fabio Somenzi
| Venue: | in Proceedings of the 37th ACM/IEEE Design Automation Conference, (Los Angeles |
| Citations: | 12 - 0 self |
BibTeX
@INPROCEEDINGS{Cabodi00optimizingsequential,
author = {Gianpiero Cabodi and Stefano Quer and Fabio Somenzi},
title = {Optimizing Sequential Verification by Retiming Transformations},
booktitle = {in Proceedings of the 37th ACM/IEEE Design Automation Conference, (Los Angeles},
year = {2000},
pages = {601--606}
}
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Abstract
Sequential verification methods based on reachability analysis are still limited by the size of the BDDs involved in computations. Extending their applicability to larger and real circuits is still a key issue.
Citations
| 30 | Improved reachability analysis of large finite state machines - Cabodi, Camurati, et al. - 1996 |
| 24 | Hints to accelerate symbolic traversal - Ravi, Somenzi - 1999 |
| 17 | Record & Play: A Structural Fixed Point Iteration for Sequential Circuit Verification - Stoffel, Kunz - 1997 |
| 12 | Model checking the IBM gigahertz processor: An abstraction algorithm for highperformance netlists - Baumgartner, Heyman, et al. - 1999 |
| 10 | Formal Implementation Verification of the Bus Interface Unit for the Alpha 21264 - Bischoff, Brace, et al. - 1997 |
| 7 | Exploiting retiming in a guided simulation based validation methodology - Gupta, Ashar, et al. - 1999 |
| 5 | Retiming of EdgeTriggered Circuits with Multiple Clocks and Load Enables - Legl, Vanbekbergen, et al. - 1997 |
| 4 | Using Combinational Verification for Sequential Circuits - Ranjan, Singhal, et al. - 1999 |
| 1 | Improvements to Reachability Analysis. Unpublished manuscript - Ravi - 1997 |
