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The Formal Execution Semantics of SpecC (2002)

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by Wolfgang Mueller , Rainer Dömer , Rainer Dömer , Andreas Gerstlauer , Andreas Gerstlauer
Venue:In Proceedings of the International Symposium on System Synthesis
Citations:14 - 7 self
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BibTeX

@INPROCEEDINGS{Mueller02theformal,
    author = {Wolfgang Mueller and Rainer Dömer and Rainer Dömer and Andreas Gerstlauer and Andreas Gerstlauer},
    title = {The Formal Execution Semantics of SpecC},
    booktitle = {In Proceedings of the International Symposium on System Synthesis},
    year = {2002}
}

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Abstract

State Machine (ASM) rules reflecting the specification given in the SpecC Language Reference Manual [5]. We mainly see our formal semantics in three application areas. First, it can be taken as a high--level, pseudo code--oriented specification for the implementation of a SpecC simulator which is outlined in a separate section. Second, it is a concise, unambiguous description for documentation and standardization. Finally, it is a first step for SpecC synthesis in order to identify similar concepts with other languages like VHDL and SystemC for the definition of common patterns and language subsets.

Keyphrases

formal execution semantics    specc language reference manual    language subset    high level    application area    separate section    similar concept    state machine    specc synthesis    first step    pseudo code    specc simulator    unambiguous description    formal semantics    common pattern   

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