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Efficient Hardware Data Mining with the Apriori Algorithm on FPGAs
| Citations: | 22 - 1 self |
BibTeX
@MISC{Baker_efficienthardware,
author = {Zachary K. Baker and Viktor K. Prasanna},
title = {Efficient Hardware Data Mining with the Apriori Algorithm on FPGAs},
year = {}
}
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Abstract
The Apriori algorithm is a popular correlation-based datamining kernel. However, it is a computationally expensive algorithm and the running times can stretch up to days for large databases, as database sizes can extend to Gigabytes. Through the use of a new extension to the systolic array architecture, time required for processing can be significantly reduced. Our array architecture implementation on a Xilinx Virtex-II Pro 100 provides a performance improvement that can be orders of magnitude faster than the state-of-the-art software implementations. The system is easily scalable and introduces an efficient "systolic injection " method for intelligently reporting unpredictably generated mid-array results to a controller without any chance of collision or excessive stalling.
Keyphrases
apriori algorithm efficient hardware data mining efficient systolic injection method array architecture implementation new extension database size mid-array result systolic array architecture excessive stalling popular correlation-based datamining kernel expensive algorithm performance improvement state-of-the-art software implementation xilinx virtex-ii pro large database
