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Petrify: a tool for manipulating concurrent specifications and . . .
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@MISC{Cortadella_petrify:a,
author = {Jordi Cortadella and et al.},
title = {Petrify: a tool for manipulating concurrent specifications and . . .},
year = {}
}
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Abstract
Petrify is a tool for (1) manipulating concurrent specifications and (2) synthesis and optimization of asynchronous control circuits. Given a Petri Net (PN), a Signal Transition Graph (STG), or a Transition System (TS) 1 it (1) generates another PN or STG which is simpler than the original description and (2) produces an optimized net-list of an asynchronous controller in the target gate library while preserving the specified input-output behavior. Given a specification petrify provides a designer with a net-list of an asynchronous circuit and a PN-like description of the circuit behavior in terms of events and ordering relations between events. The latter ability of back-annotating to the specification level helps the designer to control the design process. For transforming a specification petrify performs a token flow analysis of the initial PN and produces a transition system (TS). In the initial TS, all transitions with the same label are considered as one event. The TS is then transformed and transitions relabeled to fulfill the conditions required to obtain a safe irredundant PN. For synthesis of an asynchronous implementation petrify performs state assignment by solving the Complete State Coding problem. State assignment is coupled with logic minimization and speed-independent technology mapping to a target library. The final net-list is guaranteed to be speed-independent, i.e., hazard-free under any distribution of gate delays and multiple input changes satisfying the initial specification. The tool has been used for synthesis of PNs and PNs composition [10], synthesis [7, 9, 8] and re-synthesis [29] of asynchronous controllers and can be also applied in areas related with the analysis of concurrent programs. This paper provides an overview of petrify and the theory behind its main functions.
Keyphrases
concurrent specification asynchronous controller transition system specification petrify signal transition graph pns composition initial t target gate library design process asynchronous circuit initial pn gate delay input-output behavior logic minimization asynchronous control circuit latter ability specification level main function state assignment optimized net-list pn-like description concurrent program safe irredundant pn speed-independent technology mapping multiple input change petri net target library token flow analysis complete state coding problem circuit behavior final net-list initial specification original description
