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Frequent Value Compression in Data Caches (2000)
| Citations: | 51 - 5 self |
BibTeX
@INPROCEEDINGS{Yang00frequentvalue,
author = {Jun Yang and Youtao Zhang and Rajiv Gupta},
title = {Frequent Value Compression in Data Caches},
booktitle = {},
year = {2000},
pages = {258--265}
}
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Abstract
Since the area occupied by cache memories on processor chips continues to grow, an increasing percentage of power is consumed by memory. We present the design and evaluation of the compression cache (CC) which is a rst level cache that has been designed so that each cache line can either hold one uncompressed line or two cache lines which have been compressed to at least half their lengths. We use a novel data compression scheme based upon encoding of a small number of values that appear frequently during memory accesses. This compression scheme preserves the ability to randomly access individual data items. We observed that the contents of 40%, 52% and 51% of the memory blocks of size 4, 8, and 16 words respectively in SPECint95 benchmarks can be compressed to at least half their sizes by encoding the top 2, 4, and 8 frequent values respectively. Compression allows greater amounts of data to be stored leading to substantial reductions in miss rates (0-36.4%), o-chip trac (3.948. 1%)...
Keyphrases
frequent value compression data cache cache line memory access memory block o-chip trac novel data compression scheme rst level cache cache memory specint95 benchmark uncompressed line frequent value processor chip compression scheme substantial reduction miss rate small number access individual data item compression cache
