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Prefetching using Markov predictors (1997)
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| Venue: | In ISCA |
| Citations: | 308 - 1 self |
BibTeX
@INPROCEEDINGS{Joseph97prefetchingusing,
author = {Doug Joseph and Dirk Grunwald},
title = {Prefetching using Markov predictors},
booktitle = {In ISCA},
year = {1997},
pages = {252--263}
}
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Abstract
Prefetching is one approach to reducing the latency of memory op-erations in modem computer systems. In this paper, we describe the Markov prefetcher. This prefetcher acts as an interface between the on-chip and off-chip cache, and can be added to existing com-puter designs. The Markov prefetcher is distinguished by prefetch-ing multiple reference predictions from the memory subsystem, and then prioritizing the delivery of those references to the processor. This design results in a prefetching system that provides good coverage, is accurate and produces timely results that can be ef-fectively used by the processor. In our cycle-level simulations, the Markov Prefetcher reduces the overall execution stalls due to in-struction and data memory operations by an average of 54 % for various commercial benchmarks while only using two thrds the memory of a demand-fetch cache organization. 1
Keyphrases
markov predictor markov prefetcher com-puter design off-chip cache design result memory subsystem prefetching system various commercial benchmark modem computer system demand-fetch cache organization data memory operation overall execution stall cycle-level simulation timely result prefetch-ing multiple reference prediction memory op-erations good coverage
