Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors

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Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors (1995)

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by Alvin R. Lebeck , David A. Wood

Venue:	In Proc. of the 22nd Annual Int’l Symp. on Computer Architecture (ISCA’95
Citations:	112 - 4 self

BibTeX

@INPROCEEDINGS{Lebeck95dynamicself-invalidation:,
    author = {Alvin R. Lebeck and David A. Wood},
    title = {Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors},
    booktitle = {In Proc. of the 22nd Annual Int’l Symp. on Computer Architecture (ISCA’95},
    year = {1995},
    pages = {48--59}
}

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Abstract

This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages by having a processor automatically invalidate its local copy of a cache block before a conflicting access by another processor. Eliminating invalidation overhead is particularly important under sequential consistency, where the latency of invalidating outstanding copies can increase a program’s critical path. DSI is applicable to software, hardware, and hybrid coherence schemes. In this paper we evaluate DSI in the context of hardware directory-based write-invalidate coherence protocols. Our results show that DSI reduces execution time of a sequentially consistent full-map coherence protocol by as much as 41%. This is comparable to an implementation of weak consistency that uses a coalescing write-buffer to allow up to 16 outstanding requests for exclusive blocks. When used in conjunction with weak consistency, DSI can exploit tear-off blocks—which eliminate both invalidation and acknowledgment messages— for a total reduction in messages of up to 26%.

Keyphrases

dynamic self-invalidation shared-memory multiprocessor coherence overhead weak consistency cache block invalidation overhead program critical path hardware directory-based write-invalidate coherence protocol tear-off block total reduction acknowledgment message exclusive block new technique cache coherence overhead execution time local copy outstanding request sequential consistency invalidation message outstanding copy hybrid coherence scheme sequentially consistent full-map coherence protocol