Abstract

We study the compilation of X10 to novel, highly scalable hard-ware architectures in the scope of the InvasIC project. To this end, we describe the implementation of a machine code backend and its integration into the existing X10 compiler. In our implementa-tion, the graph-based intermediate representation Firm is used. We identify several issues in the current compiler architecture related to the integration of a low-level backend. The issues and our solu-tions are independent of Firm and apply to all low-level intermedi-ate languages. Furthermore, we propose optimizations for certain X10 language constructs that are possible on invasive hardware ar-chitectures.