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## A Parallel State Assignment Algorithm for Finite State Machines (2004)

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512 | A Sangiovanni-Vincentelli. Sis: A system for sequential circuit synthesis
- Sentovich, Singh, et al.
(Show Context)
Citation Context ...imized for area, performance, power consumption, or testability. The various steps involved in optimizing an FSM are state minimization, state assignment, logic synthesis, and logic optimization. SIS =-=[17]-=- is a popular tool for synthesis and optimization of sequential circuits. Many different programs and algorithms have been integrated into SIS, allowing the user a range of choices at each step of the... |

87 |
Nova: state assignment of finite state machines for optimal two-level logic implementations
- Villa, Sangiovanni-Vincentelli
- 1989
(Show Context)
Citation Context ...allowing the user a range of choices at each step of the optimization process. The first step of optimization, state minimization, is performed using STAMINA [16]. Two state assignment programs, NOVA =-=[19]-=- and JEDI, are distributed with SIS. After state assignment, the resulting logic for the output can be minimized by the logic minimizer ESPRESSO [18] which tries to find a logic representation with th... |

46 | A fast, parallel spanning tree algorithm for symmetric multiprocessors (SMPs
- Bader, Cong
- 2005
(Show Context)
Citation Context ...networks (e.g., vendor-supplied, or third party such as Myricom, Quadrics, and InfiniBand). Current research has shown that it is possible to design algorithms for irregular and discrete computations =-=[6, 7, 3, 4]-=- that provide efficient and scalable performance on SMPs. With the rapid strides in VLSI technology, circuit design and analysis are becoming increasingly complex. There is a growing need for sophisti... |

45 |
Placement by simulated annealing on a multiprocessor
- Kravitz, Rutenbar
- 1987
(Show Context)
Citation Context ...g using the divide and conquer strategy as well as the parallel moves technique. Previous research shows that these techniques of parallel simulation are well-suited for shared memory multiprocessors =-=[13]-=-. A unique global configuration is maintained in divide and conquer and parallel moves, which simplifies the implementation for shared memory. The principle of parallel moves applies multiple moves to... |

43 | MUSTANG: State Assignment of Finite State Machines Targeting Multi-level Logic Implementations
- Devadas, Ma, et al.
- 1988
(Show Context)
Citation Context ... also proposed. The sequential logic optimization tool SIS uses algebraic techniques to factor the logic equations. It minimizes the logic by identifying common subexpressions. The algorithms MUSTANG =-=[9]-=- and JEDI use this fact and try to maximize the size as well as the number of common subexpressions. These algorithms target a multilevel logic 4simplementation and the number of literals in the combi... |

42 | Exact and Heuristic Algorithms for the Minimization of Incompletely Specified State Machines,”EDAC
- Hachtel, Rho, et al.
- 1991
(Show Context)
Citation Context ...algorithms have been integrated into SIS, allowing the user a range of choices at each step of the optimization process. The first step of optimization, state minimization, is performed using STAMINA =-=[16]-=-. Two state assignment programs, NOVA [19] and JEDI, are distributed with SIS. After state assignment, the resulting logic for the output can be minimized by the logic minimizer ESPRESSO [18] which tr... |

33 | Fast Shared-Memory Algorithms for Computing the Minimum Spanning Forest of Sparse Graphs
- Bader, Cong
(Show Context)
Citation Context ...networks (e.g., vendor-supplied, or third party such as Myricom, Quadrics, and InfiniBand). Current research has shown that it is possible to design algorithms for irregular and discrete computations =-=[6, 7, 3, 4]-=- that provide efficient and scalable performance on SMPs. With the rapid strides in VLSI technology, circuit design and analysis are becoming increasingly complex. There is a growing need for sophisti... |

28 |
Synthesis of multiple level logic from symbolic high-level description languages
- Lin, Newton
- 1989
(Show Context)
Citation Context ...ics that try to solve this task are computationally intensive and fail for large problem instances. The parallel implementation discussed in the paper, which is based on the sequential algorithm JEDI =-=[14]-=-, overcomes this limitation and attains better results, i.e., designs with fewer literals (a Boolean variable or its negation) and hence, faster circuits with reduced size and power consumption, as we... |

26 | Evaluating arithmetic expressions using tree contraction: A fast and scalable parallel implementation for symmetric multiprocessors (SMPs
- Bader, Sreshta, et al.
- 2002
(Show Context)
Citation Context ...networks (e.g., vendor-supplied, or third party such as Myricom, Quadrics, and InfiniBand). Current research has shown that it is possible to design algorithms for irregular and discrete computations =-=[6, 7, 3, 4]-=- that provide efficient and scalable performance on SMPs. With the rapid strides in VLSI technology, circuit design and analysis are becoming increasingly complex. There is a growing need for sophisti... |

20 | Using PRAM algorithms on a uniform-memoryaccess shared-memory architecture,” preprint
- Bader, Illendula, et al.
(Show Context)
Citation Context |

18 | ProperCAD: A portable object-oriented parallel environment for VLSI
- Ramkumar, Banerjee
- 1994
(Show Context)
Citation Context ...sj)) denotes the Hamming distance between two codes si and sj. The sequential algorithm JEDI on which our parallel algorithm is based is discussed in detail in the next section. The ProperCAD project =-=[15]-=- aims to develop portable parallel algorithms for VLSI CAD applications. Parallel algorithms for state assignment [11] based on MUSTANG and JEDI have also been proposed as part of this project. Howeve... |

16 | ProperPLACE: A portable parallel algorithm for cell placement
- Kim, Chandy, et al.
- 1994
(Show Context)
Citation Context ...minimized. This is done using simulated annealing, which is a computationally intensive process. A lot of research has been done in parallelizing it for the placement problem in VLSI CAD applications =-=[12]-=-. Our implementation implements simulated annealing using the divide and conquer strategy as well as the parallel moves technique. Previous research shows that these techniques of parallel simulation ... |

12 | Espresso-HF: A Heuristic Hazard-Free Minimizer for TwoLevel Logic
- Theobald, Nowick, et al.
- 1996
(Show Context)
Citation Context ... STAMINA [16]. Two state assignment programs, NOVA [19] and JEDI, are distributed with SIS. After state assignment, the resulting logic for the output can be minimized by the logic minimizer ESPRESSO =-=[18]-=- which tries to find a logic representation with the minimum literals while preserving the functionality of the FSM. 2 Problem Overview The State assignment problem deals with assignment of unique bin... |

8 | State assignment of finite state machines using a genetic algorithm
- Almaini
- 1995
(Show Context)
Citation Context ...f state assignment algorithms. KISS is one of the first algorithms proposed targeting a PLA-based implementation. NOVA improves on KISS and is based on a graph embedding algorithm. Genetic algorithms =-=[1]-=- and algorithms based on FSM decomposition [2] are also proposed. The sequential logic optimization tool SIS uses algebraic techniques to factor the logic equations. It minimizes the logic by identify... |

7 |
Synthesis and optimization of multistage logic
- Brayton, McMullen
- 1984
(Show Context)
Citation Context ...ctions can be implemented efficiently. Most of the algorithms optimize for the area of logic implementation. The number of literals in the factored form of logic is the accepted and standard estimate =-=[8]-=- for area requirements of a logic implementation. The parallel algorithm discussed here minimizes this measure and thus optimizes for the area. To illustrate the significance of state assignment, cons... |

6 |
A unified approach to the decomposition and redecomposition of sequential machines
- Ashar, Devadas, et al.
- 1990
(Show Context)
Citation Context ...the first algorithms proposed targeting a PLA-based implementation. NOVA improves on KISS and is based on a graph embedding algorithm. Genetic algorithms [1] and algorithms based on FSM decomposition =-=[2]-=- are also proposed. The sequential logic optimization tool SIS uses algebraic techniques to factor the logic equations. It minimizes the logic by identifying common subexpressions. The algorithms MUST... |

3 |
A Methodology for Programming High Performance Algorithms on Clusters of Symmetric Multiprocessors (SMPs
- SIMPLE
- 1999
(Show Context)
Citation Context ... required parameters such as the literal count and final output logic then can be retrieved for further analysis. 4 Parallel Implementation We parallelize JEDI using the SMP Node primitives of SIMPLE =-=[5]-=-, a methodology for developing high performance programs on clusters of SMPs. Both the weight computation and the encoding stages (the computationally expensive steps) have been parallelized. Our sour... |

3 | A parallel algorithm for state assignment in finite state machines
- Hasteer, Banerjee
- 1996
(Show Context)
Citation Context ...orithm is based is discussed in detail in the next section. The ProperCAD project [15] aims to develop portable parallel algorithms for VLSI CAD applications. Parallel algorithms for state assignment =-=[11]-=- based on MUSTANG and JEDI have also been proposed as part of this project. However, the speedups in case of shared memory implementations were not significant. The shared memory algorithm discussed h... |