### Citations

542 | Introduction to VLSI systems - Mead, Conway - 1980 |

380 | Error-Correcting Codes - Peterson, Jr - 1972 |

187 | I/o complexity: The red-blue pebble game - Hong, Kung - 1981 |

171 | Optimizing synchronous systems - Leiserson, Saxe - 1983 |

105 | Systolic arrays (for VLSI - Kung, Leiserson - 1979 |

77 | Matrix triangularization by systolic arrays - Gentleman, Kung - 1981 |

45 |
Let's design algorithms for VLSI systems
- Kung
- 1979
(Show Context)
Citation Context ...adcast and unbounded fan-in, or have each input travel through an array of cells so that it is used at each cell. For modular expansibility of the resulting system, the second approach is preferable. =-=(2)-=- The design uses extensive concurrency. The processing power of a systolic architecture comes from concurrent use of many simple cells rather than sequential use of a few powerful processors as in man... |

39 | Direct VLSI implementation for combinatorial algorithms - Guibas, Kung, et al. - 1979 |

38 | Two’s complement pipeline multipliers - Lyon - 1976 |

28 |
The desssign of specialpurpose VLSI chips
- Foster, Kung
- 1980
(Show Context)
Citation Context ...ommunication. Criteria and advantages Having described a family of systolic convolution arrays, we can now be more precise in suggesting and evaluating criteria for the design of systolic structures. =-=(1)-=- The design makes multiple use of each input data item. Because of this property, systolic systems can achieve high throughputs with modest I/O bandwidths for outside communication. To meet this crite... |

28 | Systolic priority queues - Leiserson - 1979 |

27 | I/;A Tree Machine for Searching Problems - Bentley, l |

19 |
Systolic (VLSI) arrays for relational database operations
- HT, Lehman
- 1980
(Show Context)
Citation Context ...ementations each cell could reasonably contain a high-performance arithmetic unit plus a few thousand words of memory. There is, of course, always a trade-off between cell simplicity and flexibility. =-=(4)-=- Data and controlflo ws are simple and regular. Pure systolic systems totally avoid long-distance or irregular wires for data communication. The only global communication (besides power and ground) is... |

18 | A parallel algorithm for constructing minimum spanning trees - Bentley - 1980 |

13 | Digital Signal Processing Applications of Systolic Algorithms - Capello, Steiglitz - 1981 |

11 | Microelectronics and computer science - Sutherland, Mead - 1977 |

11 | Hardware algorithm for nonnumeric computation - Mukhopadhyay - 1979 |

11 | A TwoLevel Pipelined Systolic Array for Convolutions - Kung, Ruane, et al. - 1981 |

10 | Architecture for VLSI design of Reed–Solomon decoders - Liu - 1984 |

10 | Algorithm and hardware for a merge sort using multiple processors - Todd - 1978 |

8 |
Special purpose devices for signal and image processing: An opportunity
- Kung
- 1980
(Show Context)
Citation Context ...support two-level pipelining.25 Since system cycle time is the time of a stage of a cell, rather than the whole cell cycle time, two-level pipelined systolic systems significantly improve throughput. =-=(3)-=- There are only afew types ofsimple cells. To achieve performance goals, a systolic system is likely to use a large number of cells. The cells must be simple and of only a few types to curtail design ... |

8 | A 200 MOPS systolic processor - Blackmer, Kuekes, et al. - 1981 |

7 | A Wavefront Notation Tool for VLSI Array Design - Weiser, Davis - 1981 |

6 | Systolic Algorithm for running order statistics in signal and image. Digital System - Fisher - 1982 |

6 | Systolic stacks, queues, and counters - Guibas, Liang - 1982 |

5 | A Systolic 2-D Convolution Chip - Kung, Song - 1981 |

5 | Hardware pipelines for multi-dimensional convolution and resampling - Kung, Picard - 1981 |

5 | A dictionary machine (for VLSI - Ottmann, Rosenberg, et al. - 1982 |

5 | Recognize Regular Languages with Programmable Building-Blocks - Foster, Kung - 1981 |

3 | Systolic Array Processor Developments - Bromley, Szymanski, et al. - 1981 |

3 | Use of VLSI in Algebraic Computation: Some Suggestions - Kung - 1981 |

3 | A Systolic (VLSI) Array for Processing Simple Relational Queries - Lehman - 1981 |

2 | On a High-Performance VLSI Solution to Database Problems - Song - 1981 |

2 | i l b e r t , " Arithmetic f o r ultra-high-speed tomography - Swartzlander, G - 1980 |

1 | The ESL Systolic Processor for Signal and Image - Yen, Kulkarni - 1981 |

1 | Hardware Prospects and Limitations," in The Computer Age: A Twenty-Year Review - Noyce - 1979 |

1 | Mathematical Approach to Computational Networks - Cohen - 1978 |

1 | The Synthesis of Linear Sequential Coding Networks - Huffman - 1957 |

1 | Numerically Stable Solution ofDense Systems ofLinear Equations Using Mesh-Connected Processors - Bojanczyk, Brent, et al. |

1 | A Systolic Data Structure Chip fof Connectivity Problems - Savage - 1981 |

1 | et al., " 128-Bit Multicomparator - Mead - 1976 |