Citations
| 214 |
Multiplication of multidigit numbers on automata
- Karatsuba, Ofman
- 1963
(Show Context)
Citation Context ...high performance and low energy consumption are demanded. Two well-known methods of realizing highperformance multi-digit multiplication exist: Karatsuba method with computation complexity of O(n1.58)=-=[6]-=- and FFT method with the complexity of O(n log n log log n)[7], where n stands for bit length of operands. Karatsuba method is employed in multiplication of hundreds to thousands bits, whereas FFT met... |
| 191 |
Chaos and Time-Series Analysis
- Sprott
- 2003
(Show Context)
Citation Context ...many modern applications such as secured mobile communications. Multi-digit multiplication is widely used for various applications in recent years, including numerical calculation[1], chaos arithmetic=-=[2]-=-, primality testing[3]. In particular, cryptography using chaos found many applications in image processing[4] and communications[5]. For such applications, systems with high performance and low energ... |
| 17 | Area efficient hardware implementation of elliptic curve cryptography by iteratively applying Karatsuba's method
- Dyka, Langendoerfer
- 2005
(Show Context)
Citation Context ...ts of hardware implementation of FFT method in Ref.[8]. There are many studies on hardware implementation of Karatsuba algorithm over Galois Field (GF) intended for use in elliptic curve cryptography =-=[9, 10]-=-. Regarding hardware implementation of multi-digit integer multiplication based on Karatsuba algorithm for applications such as chaotic cryptography and communications, however, studies are rare. Amon... |
| 11 |
Chaotic filter bank for computer cryptography
- Ling, Ho, et al.
- 2007
(Show Context)
Citation Context ...various applications in recent years, including numerical calculation[1], chaos arithmetic[2], primality testing[3]. In particular, cryptography using chaos found many applications in image processing=-=[4]-=- and communications[5]. For such applications, systems with high performance and low energy consumption are demanded. Two well-known methods of realizing highperformance multi-digit multiplication exi... |
| 7 |
High-accurate numerical method for integral equations of the first kind under multipleprecision arithmetic,”
- Fujiwara
- 2006
(Show Context)
Citation Context ...ssor is justified in many modern applications such as secured mobile communications. Multi-digit multiplication is widely used for various applications in recent years, including numerical calculation=-=[1]-=-, chaos arithmetic[2], primality testing[3]. In particular, cryptography using chaos found many applications in image processing[4] and communications[5]. For such applications, systems with high perf... |
| 5 |
Design of secure digital communication systems using chaotic modulation, cryptography and chaotic synchronization",
- Chien, Liao
- 2005
(Show Context)
Citation Context ...n recent years, including numerical calculation[1], chaos arithmetic[2], primality testing[3]. In particular, cryptography using chaos found many applications in image processing[4] and communications=-=[5]-=-. For such applications, systems with high performance and low energy consumption are demanded. Two well-known methods of realizing highperformance multi-digit multiplication exist: Karatsuba method w... |
| 4 | FPGA designs of parallel high performance GF (2233) multipliers [cryptographic applications
- Grabbe, Bednara, et al.
- 2003
(Show Context)
Citation Context ...ts of hardware implementation of FFT method in Ref.[8]. There are many studies on hardware implementation of Karatsuba algorithm over Galois Field (GF) intended for use in elliptic curve cryptography =-=[9, 10]-=-. Regarding hardware implementation of multi-digit integer multiplication based on Karatsuba algorithm for applications such as chaotic cryptography and communications, however, studies are rare. Amon... |
| 3 |
Reduced area parallel multiplier based on Karatsuba algorithm
- Shibaoka, Takagi, et al.
(Show Context)
Citation Context ... hardware implementation of multi-digit integer multiplication based on Karatsuba algorithm for applications such as chaotic cryptography and communications, however, studies are rare. Among them Ref.=-=[11]-=- dealt with hardware implementation of 32-bit integer Karatsuba multiplier, and Ref.[12] designed and evaluated integer Karatsuba multipliers of up to 512-bit length with combinational circuits. In th... |
| 2 | An optimum design of FFT multidigit multiplier and its VLSI implementation
- Yazaki, Abe
- 2006
(Show Context)
Citation Context ...d is employed in multiplication of hundreds to thousands bits, whereas FFT method is used for millions bit multiplication. We have reported the results of hardware implementation of FFT method in Ref.=-=[8]-=-. There are many studies on hardware implementation of Karatsuba algorithm over Galois Field (GF) intended for use in elliptic curve cryptography [9, 10]. Regarding hardware implementation of multi-di... |
| 1 |
The art of computer programming 2nd edition: Seminumerical algorithms
- Knuth
- 1981
(Show Context)
Citation Context ...well-known methods of realizing highperformance multi-digit multiplication exist: Karatsuba method with computation complexity of O(n1.58)[6] and FFT method with the complexity of O(n log n log log n)=-=[7]-=-, where n stands for bit length of operands. Karatsuba method is employed in multiplication of hundreds to thousands bits, whereas FFT method is used for millions bit multiplication. We have reported ... |
| 1 | VLSI Implementation of Karatsuba Algorithm and Its Evaluation
- Yazaki, Abe
- 2006
(Show Context)
Citation Context ...thm for applications such as chaotic cryptography and communications, however, studies are rare. Among them Ref.[11] dealt with hardware implementation of 32-bit integer Karatsuba multiplier, and Ref.=-=[12]-=- designed and evaluated integer Karatsuba multipliers of up to 512-bit length with combinational circuits. In this paper we investigate the cost and performance of hardware implementation of multi-dig... |
