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...etch size to vary based on the detected spatial locality. Another method allows the number of blocks fetched on a miss to vary across program execution, but not across different data [6]. Hardware [7]=-=[8]-=-[9][10][11] and software [12][13][14] prefetching methods for uniprocessor machines have been proposed. However, many of these methods focus on prefetching regular array accesses within well-structure...

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...e fetch size to vary based on the detected spatial locality. Another method allows the number of blocks fetched on a miss to vary across program execution, but not across different data [6]. Hardware =-=[7]-=-[8][9][10][11] and software [12][13][14] prefetching methods for uniprocessor machines have been proposed. However, many of these methods focus on prefetching regular array accesses within well-struct...

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...etected spatial locality. Another method allows the number of blocks fetched on a miss to vary across program execution, but not across different data [6]. Hardware [7][8][9][10][11] and software [12]=-=[13]-=-[14] prefetching methods for uniprocessor machines have been proposed. However, many of these methods focus on prefetching regular array accesses within well-structured loops, which are access pattern...

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...h size to vary based on the detected spatial locality. Another method allows the number of blocks fetched on a miss to vary across program execution, but not across different data [6]. Hardware [7][8]=-=[9]-=-[10][11] and software [12][13][14] prefetching methods for uniprocessor machines have been proposed. However, many of these methods focus on prefetching regular array accesses within well-structured l...

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...erence inputs, and 099.go, 147.vortex, 130.li, 134.perl, and 124.m88ksim from the SPEC95 benchmark suite using the training inputs. The last two benchmarks consist of modules from the IMPACT compiler =-=[24]-=- that we felt were representative of many real-world integer applications.sPcode, the front end of IMPACT, is run performing dependence analysis with the internal representation of the combine.c file ...

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... many of these methods focus on prefetching regular array accesses within well-structured loops, which are access patterns primarily found in numeric codes. Other methods geared towards integer codes =-=[15]-=-[16] focus on compiler-inserted prefetching of pointer targets, and could be used in conjunction with our techniques. The dual data cache [17] attempts to intelligently exploit both spatial and tempor...

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...to vary based on the detected spatial locality. Another method allows the number of blocks fetched on a miss to vary across program execution, but not across different data [6]. Hardware [7][8][9][10]=-=[11]-=- and software [12][13][14] prefetching methods for uniprocessor machines have been proposed. However, many of these methods focus on prefetching regular array accesses within well-structured loops, wh...

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...numeric codes. Other methods geared towards integer codes [15][16] focus on compiler-inserted prefetching of pointer targets, and could be used in conjunction with our techniques. The dual data cache =-=[17]-=- attempts to intelligently exploit both spatial and temporal locality, however the temporal and spatial data must be placed in separate structures, and therefore the relative amounts of each type of d...

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...he detected spatial locality. Another method allows the number of blocks fetched on a miss to vary across program execution, but not across different data [6]. Hardware [7][8][9][10][11] and software =-=[12]-=-[13][14] prefetching methods for uniprocessor machines have been proposed. However, many of these methods focus on prefetching regular array accesses within well-structured loops, which are access pat...

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...zed in this work. We showed that cache bypassing decisions could be effectively made at run-time, based on the previous usage of the memory address being accessed. Other bypassing schemes include [20]=-=[21]-=-[17][22]. In particular, our scheme dynamically kept track of the accessing frequencies of memory regions called macroblocks. The macroblocks are staticallydefined blocks of memory with uniform size, ...

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...cesses to multiple adjacent cache blocks, facilitating detection of spatial locality across those blocks while they are cached. The resulting information is later recorded in the Memory Address Table =-=[3]-=- for long-term tracking of larger regions called macroblocks. We show that these extensions to the cache microarchitecture significantly improve the performance of integer applications, achieving up t...

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... lines, equal to the smaller fetch size, and optionally fill in multiple, consecutive blocks when the larger fetch size is chosen. This approach is similar to that used in some prefetching strategies =-=[23]-=-. As a result, the cache can be fully utilized, even when the smaller sizes are fetched. It also eliminates conflict misses resulting from accesses to different subblocks. However, this approach makes...

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...tilized in this work. We showed that cache bypassing decisions could be effectively made at run-time, based on the previous usage of the memory address being accessed. Other bypassing schemes include =-=[20]-=-[21][17][22]. In particular, our scheme dynamically kept track of the accessing frequencies of memory regions called macroblocks. The macroblocks are staticallydefined blocks of memory with uniform si...

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...his work. We showed that cache bypassing decisions could be effectively made at run-time, based on the previous usage of the memory address being accessed. Other bypassing schemes include [20][21][17]=-=[22]-=-. In particular, our scheme dynamically kept track of the accessing frequencies of memory regions called macroblocks. The macroblocks are staticallydefined blocks of memory with uniform size, larger t...

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...-byte block boundaries). We chose this block size because past studies have found that 16 or 32-byte block sizes maximize data cache performance [4]. These measurement techniques differ from those in =-=[19]-=-, which explicitely measure the reuse distance (in time). Our goal is to measure both the reused and unused portions of the cache blocks, for different cache organizations. Figure 1(a) shows the spati...

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...ted spatial locality. Another method allows the number of blocks fetched on a miss to vary across program execution, but not across different data [6]. Hardware [7][8][9][10][11] and software [12][13]=-=[14]-=- prefetching methods for uniprocessor machines have been proposed. However, many of these methods focus on prefetching regular array accesses within well-structured loops, which are access patterns pr...

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... Section 6 performs a cost analysis of the added hardware; and Section 7 concludes with future directions. 2 Related Work Several studies have examined the performance effects of cache block sizes [4]=-=[5]-=-. One of the studies allowed multiple consecutive blocks to be fetched with one request [4], and found that for data caches the optimal statically-determined fetch size was generally twice the block s...

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...y of these methods focus on prefetching regular array accesses within well-structured loops, which are access patterns primarily found in numeric codes. Other methods geared towards integer codes [15]=-=[16]-=- focus on compiler-inserted prefetching of pointer targets, and could be used in conjunction with our techniques. The dual data cache [17] attempts to intelligently exploit both spatial and temporal l...

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...r, we allow the fetch size to vary based on the detected spatial locality. Another method allows the number of blocks fetched on a miss to vary across program execution, but not across different data =-=[6]-=-. Hardware [7][8][9][10][11] and software [12][13][14] prefetching methods for uniprocessor machines have been proposed. However, many of these methods focus on prefetching regular array accesses with...

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... the spatial locality detection method was tuned to numeric codes with constant stride vectors. In integer codes, the spatial locality patterns may not be as regular. The split temporal/spatial cache =-=[18]-=- is similar in structure to the dual data cache, however, the runtime locality detection mechanism is quite different than that of both the dual data cache and this paper. 3 Spatial Locality Caches se...

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...spatial locality is absent, and the prefetching e ect of large fetch sizes when spatial locality exists. 1 Introduction This paper introduces an approach to solving the growing memory latency problem =-=[1]-=- by intelligently exploiting spatial locality. Spatial locality refers to the tendency for neighboring memory locations to be referenced close together in time. Traditionally there have been two main ...

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...patial locality is absent, and the prefetching effect of large fetch sizes when spatial locality exists. 1 Introduction This paper introduces an approach to solving the growing memory latency problem =-=[2]-=- by intelligently exploiting spatialslocality. Spatial locality refers to the tendency for neighboring memory locations to be referenced close together in time. Traditionally there have been two main ...

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...le 2. The base machine configuration is described in Table 3. Since simulating the entire applications at this level of detail would be impractical, uniform sampling is used to reduce simulation time =-=[25]-=-, however emulation is still performed Technical Report IMPACT-97-02 7 Function Latency Function Latency Int ALU 1 FP ALU 2 memory load 2 FP multiply 2 memory store 1 FP divide (single prec.) 8 branch...

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...ize to vary based on the detected spatial locality. Another method allows the number of blocks fetched on a miss to vary across program execution, but not across different data [6]. Hardware [7][8][9]=-=[10]-=-[11] and software [12][13][14] prefetching methods for uniprocessor machines have been proposed. However, many of these methods focus on prefetching regular array accesses within well-structured loops...

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... the detected spatial locality. Another method allows the number of blocks fetched on a miss to vary across program execution, but not across di erent data [5]. Hardware [6][7][8][9][10] and software =-=[11]-=-[12][13] prefetching methods for uniprocessor machines have been proposed. However, many of these methods focus on prefetching regular array accesses within well-structured loops, which are access pat...

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...this work. We showed that cache bypassing decisions could be e ectively made at run-time, based on the previous usage of the memory address being accessed. Other bypassing schemes include [19][20][16]=-=[21]-=-. In particular, our scheme dynamically kept track of the accessing frequencies of memory regions called macroblocks. The macroblocks are staticallyde ned blocks of memory with uniform size, larger th...

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...ized in this work. We showed that cache bypassing decisions could be e ectively made at run-time, based on the previous usage of the memory address being accessed. Other bypassing schemes include [20]=-=[21]-=-[17][22]. In particular, our scheme dynamically kept track of the accessing frequencies of memory regions called macroblocks. The macroblocks are staticallyde ned blocks of memory with uniform size, l...