Software power estimation and optimization for high performance, 32-bit embedded processors

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Software power estimation and optimization for high performance, 32-bit embedded processors (1998)

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by Jeffry T. Russell , Margarida F. Jacome

Venue:	in Proc. Int. Conf. Computer Design
Citations:	81 - 1 self

Citations

1509	Data Reduction and Error Analysis for the Physical Sciences - Bevington, Robinson - 1992 (Show Context) Citation Context ...eatures as caches, pipelined bus interfaces, interrupt controllers, DRAM memory controllers, or virtual memory managers. We considered two implementations of the architecture, the 80960JF and 80960HD =-=[16]-=-[18]. The HD enhances performance for 3-4 times the cost with a clock doubled core and parallel execution of math and memory operations [22]. Superscalar effects were not included in the formal determ...
404	Power analysis of embedded software: a first step towards software power minimization,” - Tiwari, Malik, et al. - 1994 (Show Context) Citation Context ...esign and estimation techniques for hardware is given in [1] and [2]. Many power analysis techniques use software as a stimulus for a hardware simulation [10] [11] [12] [13] [14] [15]. Tiwari, et al. =-=[4]-=- used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5][6][7][8][9] . The idea of developing an instruction level power mod...
179	Instruction level power analysis and optimization of software. - Tiwari, Malik, et al. - 1996 (Show Context) Citation Context ...ardware simulation [10] [11] [12] [13] [14] [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5]=-=[6]-=-[7][8][9] . The idea of developing an instruction level power model for individual processors was first proposed in [4]. Power is modeled as a base cost for each instruction plus a circuit state overh...
113	Power analysis and minimization techniques for embedded DSP software. - Lee, Tiwari, et al. - 1997 (Show Context) Citation Context ...ware simulation [10] [11] [12] [13] [14] [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5][6]=-=[7]-=-[8][9] . The idea of developing an instruction level power model for individual processors was first proposed in [4]. Power is modeled as a base cost for each instruction plus a circuit state overhead...
109	Compilation techniques for low energy: an overview,” - Tiwari, Malik, et al. - 1994 (Show Context) Citation Context ...a hardware simulation [10] [11] [12] [13] [14] [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in =-=[5]-=-[6][7][8][9] . The idea of developing an instruction level power model for individual processors was first proposed in [4]. Power is modeled as a base cost for each instruction plus a circuit state ov...
63	Low power architecture design and compilation techniques for high-performance processors. - Su, Tsui, et al. - 1994 (Show Context) Citation Context ...imulation [10] [11] [12] [13] [14] [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5][6][7][8]=-=[9]-=- . The idea of developing an instruction level power model for individual processors was first proposed in [4]. Power is modeled as a base cost for each instruction plus a circuit state overhead that ...
52	Black box capacitance models for architectural power analysis. - Landman, Rabaey - 1994 (Show Context) Citation Context ...nd A good survey of low power design and estimation techniques for hardware is given in [1] and [2]. Many power analysis techniques use software as a stimulus for a hardware simulation [10] [11] [12] =-=[13]-=- [14] [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5][6][7][8][9] . The idea of developing ...
45	Techniques for Low Energy Software," - Mehta - 1997 (Show Context) Citation Context ...e simulation [10] [11] [12] [13] [14] [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5][6][7]=-=[8]-=-[9] . The idea of developing an instruction level power model for individual processors was first proposed in [4]. Power is modeled as a base cost for each instruction plus a circuit state overhead th...
19	Power-Conscious Software Design - a framework for modeling software on hardware,” - Ong - 1994 (Show Context) Citation Context .... Background A good survey of low power design and estimation techniques for hardware is given in [1] and [2]. Many power analysis techniques use software as a stimulus for a hardware simulation [10] =-=[11]-=- [12] [13] [14] [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5][6][7][8][9] . The idea of d...
18	Instruction Level Power Profiling - Mehta, Owens, et al. - 1996 (Show Context) Citation Context ...good survey of low power design and estimation techniques for hardware is given in [1] and [2]. Many power analysis techniques use software as a stimulus for a hardware simulation [10] [11] [12] [13] =-=[14]-=- [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5][6][7][8][9] . The idea of developing an in...
15	Evaluation of architecture-level power estimation for CMOS RISC processors - Sato, Ootaguro, et al. - 1995 (Show Context) Citation Context ...kground A good survey of low power design and estimation techniques for hardware is given in [1] and [2]. Many power analysis techniques use software as a stimulus for a hardware simulation [10] [11] =-=[12]-=- [13] [14] [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5][6][7][8][9] . The idea of develo...
6	Statistics: An introduction (3rd - Kirk - 1990 (Show Context) Citation Context ...istical inference. 3.3 Proposed Model We propose a simple model in which power is modeled with a constant parameter. We use the method of statistical inference to support the constant parameter model =-=[21]-=-. The experiment hypothesis is that the power consumption can be modeled with a constant parameter to accurately estimate power with less than 8% error. We define the error estimate as ∂ est = Pave - ...
3	Tutorial: A survey of optimization techniques targeting low power - Srinivas, Sharad - 1995 (Show Context) Citation Context ...the model. Some conclusions are given regarding applicability of these results in Section 4. 2. Background A good survey of low power design and estimation techniques for hardware is given in [1] and =-=[2]-=-. Many power analysis techniques use software as a stimulus for a hardware simulation [10] [11] [12] [13] [14] [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several ...
2	and performance simulators: ESP and its applications for - Sato, Nagamatsu, et al. - 1994 (Show Context) Citation Context ... 4. 2. Background A good survey of low power design and estimation techniques for hardware is given in [1] and [2]. Many power analysis techniques use software as a stimulus for a hardware simulation =-=[10]-=- [11] [12] [13] [14] [15]. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5][6][7][8][9] . The idea...
2	Devadas, “Techniques for Power Estimation of Sequential Logic Circuits under User-Specified - Monterio, S - 1994 (Show Context) Citation Context ...survey of low power design and estimation techniques for hardware is given in [1] and [2]. Many power analysis techniques use software as a stimulus for a hardware simulation [10] [11] [12] [13] [14] =-=[15]-=-. Tiwari, et al. [4] used physical measurements for software power analysis. Several software optimizations for power and/or energy were proposed in [5][6][7][8][9] . The idea of developing an instruc...
1	Power analysis of assembly level aoftware, a technical report at - Russell - 1998 (Show Context) Citation Context ...effects were not included in the formal determination of the power model, but qualitative experiments did not indicate a significant change in power consumption when instructions executed in parallel =-=[23]-=-. A mature processor family such as this includes a number of software libraries for operating systems, device drivers, communication protocols, and high-level routines to support math, graphics, and ...
1	i960 Processor Home Page, http://www.intel.com/design/i960 JF Processor 0.5 1.5 2.5 Frequency, MHz Po w er st addo bswap HD Processor 0.5 1.5 2.5 3.5 Frequency Po w er st addo bswap - Corporation (Show Context) Citation Context ...mplementations of the architecture, the 80960JF and 80960HD [16][18]. The HD enhances performance for 3-4 times the cost with a clock doubled core and parallel execution of math and memory operations =-=[22]-=-. A mature processor family such as this includes a number of software libraries for operating systems, device drivers, communication protocols, and high-level routines to support math, graphics, and ...