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## VLSI Implementation of Karatsuba Algorithm and Its Evaluation

Citations: | 1 - 1 self |

### Citations

2828 |
The art of computer programming
- Knuth
- 1998
(Show Context)
Citation Context ...-digit multiplication which is frequently used and requires much calculation time, sophisticated algorithms have been proposed such as Karatsuba method(O(n 1.58 ))[4], FFT method(O(n log n log log n))=-=[5]-=- etc., where n stands for bit length. Karatsuba algorithm is employed in multiplication of hundreds to thousands bits, whereas FFT algorithm is used for millions bit multiplication. Hardware implement... |

214 |
Multiplication of multidigit numbers on automata
- Karatsuba, Ofman
- 1963
(Show Context)
Citation Context ...esting[3] and cryptography. For multi-digit multiplication which is frequently used and requires much calculation time, sophisticated algorithms have been proposed such as Karatsuba method(O(n 1.58 ))=-=[4]-=-, FFT method(O(n log n log log n))[5] etc., where n stands for bit length. Karatsuba algorithm is employed in multiplication of hundreds to thousands bits, whereas FFT algorithm is used for millions b... |

191 |
Chaos and Time-Series Analysis
- Sprott
- 2003
(Show Context)
Citation Context ...erformance. keywords:multi-digit multiplier, Karatsuba, VLSI 1 INTRODUCTION Multi-digit arithmetic is used by various applications in recent years, including numerical calculation[1], chaos arithmetic=-=[2]-=-, high-performance primality testing[3] and cryptography. For multi-digit multiplication which is frequently used and requires much calculation time, sophisticated algorithms have been proposed such a... |

17 | Area efficient hardware implementation of elliptic curve cryptography by iteratively applying Karatsuba's method - Dyka, Langendoerfer - 2005 |

7 |
High-accurate numerical method for integral equations of the first kind under multipleprecision arithmetic,”
- Fujiwara
- 2006
(Show Context)
Citation Context ...to have better cost performance. keywords:multi-digit multiplier, Karatsuba, VLSI 1 INTRODUCTION Multi-digit arithmetic is used by various applications in recent years, including numerical calculation=-=[1]-=-, chaos arithmetic[2], high-performance primality testing[3] and cryptography. For multi-digit multiplication which is frequently used and requires much calculation time, sophisticated algorithms have... |

3 |
Reduced area parallel multiplier based on Karatsuba algorithm
- Shibaoka, Takagi, et al.
(Show Context)
Citation Context ...the design choice. In this paper we implement RKM and compare the results with WTM with respect to their critical path delay and area cost. 3 RELATED WORK 32-bit RKM was implemented by Shibaoka et al.=-=[7]-=-. RKM in [7] is based on two ideas. One is to exclude a CPA (Carry Propagation Adder) at the output stage of Wallace tree and to use CSAs (Carry Save Adders) for addition at intermediate stages. Anoth... |

2 | An optimum design of FFT multidigit multiplier and its VLSI implementation
- Yazaki, Abe
- 2006
(Show Context)
Citation Context ...multiplier has been widely used. However, studies on VLSI implementation of Karatsuba and FFT multiplication algorithms are few. We previously reported results of VLSI implementation of FFT multiplier=-=[6]-=-. In this paper we describe VLSI implementation of Karatsuba multiplier and evaluate its performance and area cost. This paper is organized as follows: Section 2 briefly explains Karatsuba algorithm a... |

2 |
FPGA designs of parallel high performance
- Grabbe, Bednara, et al.
(Show Context)
Citation Context ...rlier are added earlier. Multi-digit Karatsuba multiplier, however, is not dealt with in [7]. Many studies have been reported for applying Karatsuba algorithm to multiplication over Galois field (GF) =-=[8, 9]-=-. Critical path delay and area cost of these GF Karatsuba multipliers can not be compared with integer multiplier because calculations over GF have less computational complexity, although design appro... |