The aim of this research is to investigate and develop a modelling technique for the internal representation of embedded system specifications. The first part of the report reviews briefly the various modelling techniques that have been reported in the literature and conclude that the use of Petri Nets is a suitable technique for systems with a high degree of communication, as is the case of Hardware/Software embedded systems. The second part of the report introduces the basic principles, definitions and execution rules of a new type of modelling technique based on Petri Nets called NOEMI, that stands for Petri Net Oriented Embedded Systems Modelling. This technique was formalised in a paper submitted to Design, Automation and Test in Europe (DATE)- 2001 conference, which is included at the end of this report. A brief comparison with some recently introduced Petri Net oriented techniques is done, in order to show that the technique is at least as efficient as state of the art. Finally, a number of areas for future work are identified. 2 Chapter 1
|
954
|
Petri nets: Properties, analysis and applications
– Murata
- 1989
|
|
560
|
Coloured Petri Nets: Basic Concepts, Analysis Methods and
– Jensen
- 1995
|
|
555
|
Petri Net Theory and the Modeling of Systems
– Peterson
- 1981
|
|
387
|
Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems
– Buck, Ha, et al.
- 1994
|
|
298
|
SIS: A System for Sequential Circuit Synthesis
– Sentovich, Singh, et al.
- 1992
|
|
235
|
Kommunikation mit Automaten
– Petri
- 1962
|
|
190
|
Specification and Design of Embedded Systems
– Gajski, Vahid, et al.
- 1994
|
|
162
|
Automated Synthesis of Digital Systems
– Parker
- 1984
|
|
159
|
The Verilog Hardware Description Language
– Thomas, Moorby
- 1991
|
|
146
|
Hardware-Software Co-Design of Embedded System
– Wolf
- 1994
|
|
136
|
Hardware-Software Co-Design of Embedded Systems: The POLIS Approach
– Balarin, Chiodo, et al.
- 1997
|
|
108
|
The ESTEREL language
– Boussinot, Simone
- 1991
|
|
91
|
SpecC: specification language and methodology
– Gajski, Zhu, et al.
- 2000
|
|
74
|
The esterel synchronous programming language and its mathematical semantics
– Berry, Cosserat
- 1985
|
|
71
|
Design of embedded systems: Formal models, validation, and synthesis
– Edwards, Lavagno, et al.
- 1997
|
|
71
|
VHDL analysis and modeling of digital systems
– Navabi
- 1997
|
|
69
|
Recoverability of communication protocols
– Merlin, Faber
- 1976
|
|
67
|
Data Flow Program Graphs
– Davis, Keller
- 1982
|
|
57
|
System-level Synthesis using Reprogrammable Components
– Gupta, Micheli
- 1992
|
|
55
|
Automated Transformation of Algorithms into Register-Transfer Level Implementation
– Peng, Kuchcinski
- 1994
|
|
50
|
HardwareSoftware co-design of embedded systems: the POLIS approach
– Baloron, Giusto, et al.
- 1997
|
|
47
|
Synthesis and simulation of digital systems containing interacting hardware and software components
– Gupta, Jr, et al.
- 1992
|
|
46
|
A hardware implementation of pure Esterel
– Berry
- 1991
|
|
39
|
Dynamic communication models in embedded system co-simulation
– Hines, Borriello
- 1997
|
|
36
|
Hardwarec - a language for hardware design (version 2.0
– Ku, Micheli
- 1990
|
|
31
|
Hardware-software codesign of embedded controllers based on hardware extraction
– Ernst, Henkel
- 1992
|
|
31
|
Program implementation schemes for hardware-software systems
– Gupta, Jr, et al.
- 1994
|
|
25
|
A Formal Specification Model for Hardware/Software Codesign
– Chiodo, Giusto, et al.
- 1993
|
|
24
|
Funstate—an internal design representation for codesign
– Thiele, Strehl, et al.
- 1999
|
|
24
|
Syntax and semantics of the SpecC language
– Zhu, Dömer, et al.
- 1997
|
|
19
|
Combining multiple models of computation for scheduling and allocation
– Ziegenbein, Ernst, et al.
- 1998
|
|
18
|
Formal Verification of Embedded Systems based on CFSM Networks
– Balarin, Hsieh, et al.
- 1996
|
|
16
|
System Synthesis via Hardware-Software Co-design
– Gupta, Micheli
|
|
16
|
Software timing analysis using HW/SW cosimulation and instruction set simulator
– Liu, Lajolo, et al.
- 1998
|
|
14
|
A Formal Methodology for Automated Synthesis of VLSI Systems
– Peng
- 1987
|
|
13
|
A system-design methodology: Executable specification refinement
– Gajski
- 1994
|
|
11
|
BLIF-MV: An interchange format for design verification and synthesis
– Brayton, Chiodo, et al.
- 1991
|
|
11
|
An Approach to the Adaptation of Estimated Cost Parameters in the COSYMA System
– Herrmann, Henkel, et al.
- 1994
|
|
11
|
Essential Issue in Codesign
– Gajski, Zhu, et al.
- 1997
|
|
11
|
A Petri Net Based Unified Representation for Hardware/Software Co-Design,” Licentiate Thesis
– Stoy
- 1995
|
|
8
|
An approach to mixed systems co-synthesis
– Benner, Ernst
- 1997
|
|
8
|
A Petri Net Based Model for Heterogeneous Embedded Systems
– Cortés, Eles, et al.
- 1999
|
|
8
|
Hardware/software codesign of embedded systems—the SPI workbench
– Ernst, Ziegenbein, et al.
- 1999
|
|
8
|
Specification and design of embedded software/hardware systems
– Gajski, Vahid
- 1995
|
|
7
|
High-level Synthesis and Optimization Strategies in Hercules and Hebe
– Ku, Micheli
- 1990
|
|
7
|
Embedded system co-design: Synthesis and verification
– Lavagno, Sangiovanni-Vincentelli, et al.
- 1996
|
|
6
|
Scalable performance scheduling for HardwareSoftware Cosynthesis
– Benner, Ernst, et al.
- 1995
|
|
6
|
Hardware generation and partitioning effects in the COSYMA system
– Henkel, Benner, et al.
- 1993
|
|
4
|
A Path-Based Estimation Technique for Estimating Hardware Runtime in HW/SW-Cosynthesis
– Henkel, Ernst
- 1995
|
|
3
|
The SpecC+ language
– Gajski, Zhu, et al.
- 1997
|