research relevant to the design and application of high performance scientific computers. We test our ideas by designing, building, and using real systems. The systems we build are research prototypes; they are not intended to become products. There are two other research laboratories located in Palo Alto, the Network Systems
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217
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Eliminating receive livelock in an interrupt-driven kernel
– Mogul, Ramakrishnan
- 1997
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176
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Global register allocation at link time
– Wall
- 1986
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70
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Language as the Machine Description
– Wall, Powell
- 1987
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36
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The predictability of branches in libraries
– Calder, Grunwald, et al.
- 1995
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30
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A Unified Vector/Scalar Floating-Point Architecture
– Jouppi, Bertoni, et al.
- 1989
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28
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WRL Technical Notes "TCP/IP PrintServer: Print Server Protocol." "Predicting Program Behavior Using Real or EsBrian
– Reid, Kent
- 1988
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23
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Link-time code modification
– Wall
- 1989
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17
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Design Considerations in Dynamically Scheduled Processors
– File
- 1995
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13
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Limits of Instruction-Level Parallelism." David "Link-Time Optimization of Address Calculation on
– Wall
- 1990
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12
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Stupid Memory: A Fast X Server for a Dumb Color Frame Buffer." Joel McCormack. "A
– Code
- 1989
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11
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Optimal Group Distribution in Carry-Skip Adders
– Kent, Mogul
- 1987
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11
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The Distribution of Instruction-Level and Machine "A Simulation Based Study of TLB Performance." Parallelism and Its Effect on Performance
– Chen, Borg, et al.
- 1989
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10
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Packaging a 150 W Bipolar ECL Microprocessor." Jeremy
– Jouppi, Boyle
- 1992
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9
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WRL Research Report 86/4, "Measured Capacity of an Ethernet: Myths and
– Hamburgen
- 1986
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9
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WRL Research Report 87/2
– Rashid, Accetta
- 1987
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9
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WRL Research Report "Cache Coherence in Distributed Systems
– Turrini
- 1989
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9
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WRL Research Report 87/4
– Kent
- 1987
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9
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WRL Research Report 87/5
– Wall
- 1987
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9
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WRL Research Report 87/6
– Asente
- 1987
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9
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Available Instruction-Level Parallelism for Super"MultiTitan: Four Architecture Papers." Norman scalar and Superpipelined Machines
– Nielsen
- 1989
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9
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Integration and Packaging Plateaus of Processor "Pool Boiling Enhancement Techniques for Water at Performance." Norman P. Jouppi. WRL Low Pressure." Wade R
– Fitch, Hamburgen, et al.
- 1989
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9
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Jouppi and Jeffrey "Writing Fast X Servers for Dumb Color Frame BufY
– Norman
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9
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WRL Research Report 89/14, Septem"TurboChannel T1 Adapter
– Wall
- 1989
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9
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WRL Research Report 91/5, "Noise Issues in the ECL Circuit Family." Jeffrey
– McFarling
- 1991
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9
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Two Papers on Test Pattern Generation
– McGillis, Fitch, et al.
- 1991
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9
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Network Locality at the Scale of Processes." "Fluoroelastomer Pressure Pad Design for Jeffrey C. Mogul. WRL Research Report 91/11, Microelectronic Applications." Alberto
– Makino, Fitch
- 1991
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9
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WRL Research Report 91/12
– Jouppi
- 1991
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9
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Observing TCP Dynamics in Real Networks
– Monier, Stark, et al.
- 1992
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9
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Piecewise Linear Models for Switch-Level Simulation
– Wall
- 1994
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9
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WRL Research Report 92/5, "ATOM: A System for Building Customized
– Kao
- 1992
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9
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tion at Link-Time." Amitabh Srivastava and
– Wall
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9
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Research Report 93/1
– WRL
- 1993
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9
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WRL Research Report 93/3
– Jouppi
- 1993
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9
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Performance Implications of Multiple Pointer "An Enhanced Access and Cycle Time Model for Sizes
– Wilton, Mayo, et al.
- 1993
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8
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Reports "Titan System Manual
– Research
- 1986
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8
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Organizational Tradeoffs in the "1990 DECWRL/Livermore Magic Release." Design of the MultiTitan CPU
– Architectural
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7
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WilTechnical Note TN-7
– McGillis, Fitch
- 1988
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7
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Mostly-Copying Garbage Collection Picks Up "A Recovery Protocol For Spritely NFS." Jeffrey Generations and C
– Bartlett
- 1989
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7
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Characterization of Organic Illumination Systems." "Electrical Evaluation Of The BIPS-0 Package
– Hamburgen, Mogul, et al.
- 1992
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7
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WRL Technical Note TN-13, April "Transparent Controls for Interactive Graphics
– Bartlett
- 1989
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7
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WRL Technical Note TN-30, "Improving Direct-Mapped Cache Performance by
– Bartlett
- 1992
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7
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Technical Note TN-32, December WRL
– WRL
- 1990
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7
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WRL Technical Note "The Effect of Context Switches on Cache Perfor- TN-35
– Wall
- 1993
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6
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Drip: A Schematic Drawing Interpreter." Ramsey "Efficient Procedure Mapping using Cache Line W
– Hashemi, Kaeli
- 1995
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6
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WRL Research Report 95/2, "Optimizations and Placement with the Genetic
– Monier, Dion
- 1995
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2
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editor McGrow
– Leiserson
- 1990
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1
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Davis90 "Handbook of Genetic Algorithms" by Lawrence
– Davis
- 1991
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1
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Gold89 "Genetic Algorithms in Search Optimization & Machine Learning
– Goldberg, Addison-Wesley
- 1989
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1
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MahGold92 "Parallel Recombinative Simulated Annealing : A Genetic Algorithm IlleGAl report n
– Goldberg
- 1993
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1
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StorPri95 "Differential Evolution - A simple and efiicient adaptive scheme for global optimization over continuous spaces", by Rainer Storn and
– Price
- 1995
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