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Abstract: This paper presents an architecture for an adaptive equalizer that is dynamically reconfigurable for low-power operation. The equalizer is composed of a signal processing block which accomplishes the filtering operations and a signal monitoring block which controls reconfiguration by monitoring the equalizer performance and dynamically powering up or down filter taps in order to conserve energy. This reconfigurable equalizer is used in the design of a 51.84 Mb/s VDSL receiver core, and... (Update)
Context of citations to this paper: More
...in favor of real time reconfiguration to support the current situational case. This is the basis for reconfigurable ASICs (RASICs) [96] where just the amount of flexibility demanded by the application is introduced. Configuration cloning [73] caching, and compression...
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2: The Programmable Logic Data Book (context) - Inc - 1995
2: IEEE Signal Processing Magazine (context) - Lee, Architectures - 1988
BibTeX entry: (Update)
J. Tschanz and N. R. Shanbhag. A Low-power Reconfigurable Adaptive Equalizer Architecture. In Proceedings of the Asilomar Conference on Signals, Systems, and Computers, Monterey, CA, October 1999. http://citeseer.ist.psu.edu/tschanz99lowpower.html More
@misc{ tschanz99lowpower,
author = "J. Tschanz and N. Shanbhag",
title = "A Low-power Reconfigurable Adaptive Equalizer Architecture",
text = "J. Tschanz and N. R. Shanbhag. A Low-power Reconfigurable Adaptive Equalizer
Architecture. In Proceedings of the Asilomar Conference on Signals, Systems,
and Computers, Monterey, CA, October 1999.",
year = "1999",
url = "citeseer.ist.psu.edu/tschanz99lowpower.html" }
Citations (may not include all citations):57 Pipeline interleaving and parallelism in recursive digital f.. (context) - Parhi, Messerschmitt - 1989
42 Algorithm transformation techniques for concurrent processor.. (context) - Parhi - 1989
18 Pipelined Adaptive Digital Filters (context) - Shanbhag, Parhi - 1994
12 A low power 128-tap digital adaptive equalizer for broadband.. (context) - Nicol, Larsson et al. - 1997
11 Minimizing power using transformations (context) - Chandrakasan, Potkonjak et al. - 1995
5 Dynamic algorithm transforms for low-power reconfigurable ad.. (context) - Goel, Shanbhag - 1999
3 Lower Layer Protocols and Physical Interfaces (context) - Specification - 1996
1 VLSI system design of 51.84 Mb/s transceiver for ATM-LAN and.. (context) - Shanbhag, Im - 1998
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