(Enter summary)
Abstract: High instruction cache hit rates are key to high performance.
One known technique to improve the hit rate of caches is to
use an optimizing compiler to minimize cache interference
via an improved layout of the code. This technique, however,
has been applied to application code only, even though
there is evidence that the operating system often uses the
cache heavily and with less uniform patterns than applications.
Therefore, it is unknown how well existing optimizations
perform for systems... (Update)
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BibTeX entry: (Update)
J. Torrellas, C. Xia, and R. Daigle. Optimizing Instruction Cache Performance for Operating System Intensive Workloads. In Proceedings of the 1st International Symposium on High-Performance Computer Architecture, pages 360--369, January 1995. http://citeseer.ist.psu.edu/torrellas95optimizing.html More
@article{ torrellas98optimizing,
author = "Josep Torrellas and Chun Xia and Russel L. Daigle",
title = "Optimizing the Instruction Cache Performance of the Operating System",
journal = "IEEE Transactions on Computers",
volume = "47",
number = "12",
pages = "1363-1381",
year = "1998",
url = "citeseer.ist.psu.edu/torrellas95optimizing.html" }
Citations (may not include all citations):
217
The Perfect Club Benchmarks: Effective Performance Evaluatio..
- Berry - 1989
176
Why Aren't Operating Systems Getting Faster as Fast as Hardw..
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The Interaction of Architecture and Operating System Design
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Program Optimization for Instruction Caches (context) - McFarling - 1989
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The Impact of Operating System Structure on Memory System Pe..
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Cache Performance of Operating System and Multiprogramming W.. (context) - Agarwal, Hennessy et al. - 1988
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Page Placement Algorithms for Large Real-Indexed Caches
- Kessler, Hill - 1992
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Optimizing Instruction Cache Performance for Operating Syste..
- Torrellas, Daigle et al. - 1994
44
Trace Selection for Compiling Large C Application Programs t.. (context) - Chang, Hwu - 1988
40
ACM Transactions on Computer Systems (context) - Clark, in - 1983
36
Characterizing the Caching and Synchronization Performance o.. (context) - Torrellas, Gupta et al. - 1992
28
The Effect of Code Expanding Optimizations on Instruction Ca..
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The VMP Multiprocessor: Initial Experience (context) - Cheriton, Gupta et al. - 1988
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Optimal Allocation of On-chip Memory for Multiple-API Operat.. (context) - Nagle, Uhlig et al. - 1994
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A Hardware Tracing Facility for a Multiprocessing Supercompu.. (context) - Andrews - 1990
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