Bitwidth analysis with application to silicon compilation (2000) [62 citations — 0 self]
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@INPROCEEDINGS{Stephenson00bitwidthanalysis,author = {Mark Stephenson and Jonathan Babb and Saman Amarasinghe},
title = {Bitwidth analysis with application to silicon compilation},
booktitle = {In Proceedings of the SIGPLAN conference on Programming Language Design and Implementation},
year = {2000},
pages = {108--120}
}
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Abstract:
This paper introduces Bitwise, a compiler that minimizes the bitwidth--- the number of bits used to represent each operand--- for both integers and pointers in a program. By propagating static information both forward and backward in the program dataflow graph, Bitwise frees the programmer from declaring bitwidth invariants in cases where the compiler can determine bitwidths automatically. We find a rich opportunity for bitwidth reduction in modern multimedia and streaming application workloads. For new architectures that support sub-word quantities, we expect that our bitwidth reductions will save power and increase processor performance. This paper also applies our analysis to silicon compilation--- the translation of programs into custom hardware---to realize the full benefits of bitwidth reduction. We describe our integration of Bitwise with the DeepC Silicon Compiler. By taking advantage of bitwidth information during architectural synthesis, we reduce silicon real estate by 15 %-86%, improve clock speed by 3 %- 249%, and reduce power by 46 %- 73%. The next era of general purpose and reconfigurable architectures should strive to capture a portion of these gains.
