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Improving Value Communication for Thread-Level Speculation (2002)  (Make Corrections)  (10 citations)
J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry
HPCA



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Abstract: Thread-Level Speculation (TLS) allows us to automatically parallelize general-purpose programs by supporting parallel execution of threads that might not actually be independent. In this paper, we show that the key to good performance lies in the three different ways to communicate a value between speculative threads: speculation, synchronization, and prediction. The difficult part is deciding how and when to apply each method. This paper shows how we can apply value prediction, dynamic... (Update)

Context of citations to this paper:   More

...that breaks inter task true dependences by predicting the communicated values. This approach, in itself, is not novel [1, 15, 16, 21]; what is novel is the manner in which the predictions are made. Rather than use a history based hardware widget, our approach uses...

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Tolerating Dependences Between Large Speculative.. - Christopher Colohan..   (Correct)
Decoupled Software Pipelining with the Synchronization.. - Rangan, Vachharajani..   (Correct)
Master/slave Speculative Parallelization And Approximate Code - Zilles (2002)   (Correct)

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BibTeX entry:   (Update)

J. G. Steffan, C. B. Colohan, A. Zhai, and T. C. Mowry. "Improving Value Communication for Thread-Level Speculation." Intl. Symp. on High-Performance Computer Architecture, February 2002. http://citeseer.ist.psu.edu/steffan02improving.html   More

@inproceedings{ steffan02improving,
    author = "J. Gregory Steffan and Christopher B. Colohan and Antonia Zhai and Todd C. Mowry",
    title = "Improving Value Communication for Thread-Level Speculation",
    booktitle = "{HPCA}",
    pages = "65-",
    year = "2002",
    url = "citeseer.ist.psu.edu/steffan02improving.html" }
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38   A Scalable Approach to Thread-Level Speculation - Steffan, Colohan et al. - 2000
38   Architectural Support for Scalable Speculative Parallelizati.. - Cintra, Martnez et al. - 2000
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20   MAJC: Microprocessor Architecture for Java Computing (context) - Tremblay - 1999
19   Architectural Support for Thread-Level Data Speculation - Steffan, Colohan et al. - 1997
19   Value prediction for speculative multithreaded architectures - Marcuello, Tubella et al. - 1999
15   Techniques for Speculative Run-Time Parallelization of Loops - Gupta, Nim - 1998
12   Power4: A Dual-CPU Processor Chip (context) - Kahle - 1999
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7   Memory dependency prediction using store sets (context) - Chrysos, Emer - 1998
6   The Need for Fast Communication in Hardware-Based Speculativ.. - Krishnan, Torrellas - 1999
4   Learning cross-thread violations in speculative parallelizat.. (context) - Cintra, Torrellas - 2002
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