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Bus-Invert Coding for Low Power I/O (1995)  (Make Corrections)  (61 citations)
Mircea R. Stan, Wayne P. Burleson



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Abstract: Technology trends and especially portable applications drive the quest for low-power VLSI design. Solutions that involve algorithmic, structural or physical transformations are sought. The focus is on developing low power circuits without affecting too much the performance (area, latency, period). For CMOS circuits most power is dissipated as dynamic power for charging and discharging node capacitances. This is why many promising results in lowpower design are obtained by minimizing the number... (Update)

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1.3:   Low-Power Encodings for Global Communication in CMOS VLSI - Stan, Burleson (1997)   (Correct)
0.7:   Limited-weight codes for low-power I/O - Stan, Burleson   (Correct)
0.7:   Coding a Terminated Bus for Low Power - Stan, Burleson (1995)   (Correct)

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0.5:   Low Power CMOS with Sub-Volt Supply Voltages - Stan (2001)   (Correct)
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BibTeX entry:   (Update)

M. R. Stan and W. P. Burleson. Bus-invert coding for low-power I/O. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 3:49--58, 1995. http://citeseer.ist.psu.edu/stan95businvert.html   More

@misc{ stan95businvert,
  author = "M. Stan and W. Burleson",
  title = "Bus-invert coding for low-power I/O",
  text = "M. R. Stan and W. P. Burleson. Bus-invert coding for low-power I/O. IEEE
    Transactions on Very Large Scale Integration (VLSI) Systems, 3:49--58, 1995.",
  year = "1995",
  url = "citeseer.ist.psu.edu/stan95businvert.html" }
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200   Principles of CMOS VLSI Design (context) - Weste, Eshraghian - 1988
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80   On Average Power Dissipation and Random Pattern Testability (context) - Shen, Ghosh et al. - 1992
64   Interconnections and Packaging for VLSI (context) - Bakoglu - 1990
52   HYPER-LP: A System for Power Minimization Using Architectura.. (context) - Chandrakasan, Potkonjak et al. - 1992
45   Estimation of Power Dissipation in CMOS Combinational Circui.. - Devadas, Keutzer et al. - 1990
40   Transition Density, A Stochastic Measure of Activity in Digi.. - Najm - 1991
37   Introduction to Chip and System Design (context) - Gajski, Dutt et al. - 1992
26   A 200-MHz 64-bit Dual-Issue CMOS Microprocessor (context) - Dobberpuhl - 1992
19   Limited-weight codes for low power I/O - Stan, Burleson - 1994
11   Integrated Circuit Having Outputs Configured for Reduced Sta.. (context) - Fletcher - 1987
11   Estimating the Power Consumption of CMOS Adders (context) - Callaway, Swartzlander - 1993
9   Noise Reduction Using Low Weight and Constant Weight Coding .. (context) - Tabor - 1990
9   Comparison of Wafer Scale Integration with VLSI Packaging Ap.. (context) - Neugebauer, Carlson - 1987
4   Low-power polygon renderer for computer graphics (context) - Tan, Meng - 1993
4   Low power and paradox (context) - Wilson - 1993
3   Shift register generators for circular FIFOs (context) - Stan - 1991
2   Codes to Reduce Switching Transients Across VLSI I/O Pins (context) - Park, Maeder - 1992
2   Contact ray@rambus (context) - Overview, Inc et al. - 1993
2   Simultaneous Switching Noise (context) - Kodical - 1993
2   An Approach to Power Minimization Using Transformations (context) - Chandrakasan, Potkonjak et al. - 1992
1   Designing with the IDT SyncFIFO: the Architecture of the Fut.. (context) - Gardner - 1992



The graph only includes citing articles where the year of publication is known.


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Schematic Driven Layout Using the MOSIS Design Kit for .. - Stan, Garrett, Kolla, ..   (Correct)
Low-Power Encodings for Global Communication in CMOS VLSI - Stan, Burleson (1997)   (Correct)
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