|
852
|
An introduction to probability theory and its applications
– Feller
- 1968
|
|
594
|
MediaBench: A tool for evaluating and synthesizing multimedia and communication systems
– Lee, Potkonjak, et al.
- 1997
|
|
403
|
Synthesis and Optimization of Digital Circuits
– DeMicheli
- 1994
|
|
246
|
Retiming synchronous circuitry
– Leiserson, Saxe
- 1991
|
|
192
|
Force-directed scheduling for the behavioral synthesis of ASIC’s
– Paulin, Knight
- 1989
|
|
133
|
Parallel sequencing and assembly line problems
– Hu
- 1961
|
|
133
|
Power minimization in IC design: Principles and applications
– Pedram
- 1996
|
|
102
|
Fast prototyping of data path intensive architecture
– Rabaey, Chu, et al.
- 1991
|
|
93
|
Energy minimization using multiple supply voltages
– Chang, Pedram
- 1997
|
|
87
|
Transition density, a stochastic measure of activity
– Najm
- 1991
|
|
84
|
Probabilistic Treatment of General combinational Networks
– Parker, McCluskey
- 1975
|
|
84
|
Towards a High-Level Power Estimation Capability
– Nemani, Najm
- 1996
|
|
75
|
Sehwa: A software package for synthesis of pipelines from behavioral specifications
– Park, Parker
- 1988
|
|
59
|
Low power CMOS digital design
– Chandrakasan, Sheng, et al.
- 1992
|
|
57
|
Computers and Intractability A Guide to the Theory
– Gary, Johnson
- 1979
|
|
56
|
Maha: A program for data path synthesis
– Parker, Pizarro, et al.
- 1986
|
|
53
|
Efficient power estimation for highly correlated input streams
– Marculescu, Marculescu, et al.
- 1995
|
|
49
|
A Scheduling Algorithm for Conditional Resource Sharing
– Kim, Liu, et al.
- 1991
|
|
47
|
HYPER-LP: a system for power minimization using architectural transformations
– Chandrakasan, Rabaey
- 1992
|
|
45
|
IRSIM: An incremental MOS switch-level simulator,” in Proc. 26th Design Auromution Cont
– Salz, Horowitz
- 1989
|
|
44
|
M.Pedram, “Information Theoretic Measures for energy consumption at register transfer level
– Marculescu, Marculescu
- 1995
|
|
41
|
Tutorial on highlevel synthesis
– McFarland, Parker, et al.
- 1988
|
|
35
|
Silicon Compilation
– Gajski
- 1988
|
|
33
|
Algorithms for hardware allocation in data path synthesis
– Devadas, Newton
- 1989
|
|
30
|
FIamel: A High-Level Hardware Compiler
– Trickey
- 1987
|
|
29
|
The design and implementation of powermill
– Huang, Zhang, et al.
- 1995
|
|
28
|
High-level synthesis technique for reducing the activity of functional units
– Musoll, Cortadella
- 1995
|
|
28
|
Performance analysis and optimization of schedules for conditional and loop-intensive specifications
– Bhattacharya, Dey, et al.
- 1994
|
|
28
|
Using Bottom-Up Design Techniques in the Synthesis of Digital Hardware frmn Ahslr(j(' Behavioral Descriptions
– McFarland
- 1986
|
|
27
|
Design Tools for Intelligent Silicon Compilation
– PangrJe, Gajski
- 1987
|
|
25
|
Power estimation in sequential circuits
– Najm, Goel, et al.
- 1995
|
|
23
|
System clock estimation based on clock slack minimization
– Narayan, Gajski
- 1992
|
|
21
|
Low Power Register Allocation and Binding
– Chang, Pedram
- 1995
|
|
19
|
HYPER: An interactive synthesis environment for high performance real time applications
– Chu, Potkonjak, et al.
- 1989
|
|
19
|
Elmasry, “Architectural synthesis for DSP silicon compiler
– Haroun, I
- 1989
|
|
18
|
Speculation techniques for high level synthesis of control intensive designs
– Gupta, Savoiu, et al.
- 2001
|
|
18
|
An ILP formulation for low power based on minimizing switched capacitance during data path allocation
– Raghunathan, Jha
- 1995
|
|
17
|
Unifying behavioral synthesis and physical design
– Dougherty, Thomas
- 2000
|
|
16
|
Automatic High-Level Synthesis of Partitioned Busses
– Ewering
- 1990
|
|
15
|
Timing Constraints for Correct Performance
– Youssef, Shragowitz
- 1990
|
|
14
|
A Super-Scheduler for Embedded Reconfigurable Systems
– Memik, Bozorgzadeh, et al.
- 2001
|
|
13
|
Najm, "Statistical Estimation of the Switching Activity
– Xakellis, N
- 1994
|
|
13
|
High-level synthesis of low power control-flow intensive circuits
– Khouri, Lakshminarayana, et al.
- 1999
|
|
12
|
Node Sampling: a Robust RTL Power Modeling Approach
– Bogliolo, Benini
- 1998
|
|
11
|
Predictability: Definition, Analysis and Optimization
– Srivastava, Sarrafzadeh
- 2002
|
|
11
|
McPOWER: A Monte Carlo Approach to Power Estimation
– Butch, Najm, et al.
- 1992
|
|
10
|
Trace-driven steady-state probability estimation in fsms with application to power estimation
– Marculescu, Marculescu, et al.
- 1998
|
|
9
|
Automated synthesis of digital hardware
– Hafer, Parker
- 1982
|
|
8
|
Clock Period Optimization During Resource Sharing and Assignment
– Bhattacharya, Dey, et al.
- 1994
|
|
8
|
Estimation of Lower and Upper Bounds on the Power Consumption from Scheduled Data Flow Graphs
– Kruse, Schmidt, et al.
- 2001
|
