(Enter summary)
Abstract: :
The counterflow pipeline processor architecture (cfpp) is a proposal for a family of microarchitectures
for risc processors. The architecture derives its name from its fundamental
feature, namely that instructions and results flow in opposite directions within a pipeline and
interact as they pass. The architecture seeks geometric regularity in processor chip layout,
purely local control to avoid performance limitations of complex global pipeline stall signals,
and simplicity that might lead... (Update)
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BibTeX entry: (Update)
Robert F. Sproull, Ivan E. Sutherland, and Charles E. Molnar. The counterflow pipeline processor architecture. IEEE Design & Test of Computers, 11(3):48--59, Fall 1994. http://citeseer.ist.psu.edu/sproull94counterflow.html More
@article{ sproull94counterflow,
author = "Robert F. Sproull and Ivan E. Sutherland and Charles E. Molnar",
title = "The Counterflow Pipeline Processor Architecture",
journal = "IEEE Design \& Test of Computers",
volume = "11",
number = "3",
pages = "48--59",
year = "1994",
url = "citeseer.ist.psu.edu/sproull94counterflow.html" }
Citations (may not include all citations):
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