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Abstract: This dissertation describes Master/Slave Speculative Parallelization (MSSP), a novel execution paradigm to improve the execution rate of sequential programs by parallelizing them speculatively for execution on a multiprocessor. In MSSP, one processor---the master---executes an approximate copy of the program to compute values the program's execution is expected to compute. The master's results are then checked by the slave processors by comparing them to the results computed by the original... (Update)
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...6a, the inner loop is only executed on 0.1 percent of outer loop iterations. 3. 1 Task Selection Our sensitivity analysis results (in [24]) indicate our current automatic distiller prototype is largely insensitive to the exact task boundaries selected (performance varies less...
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3: Data speculation support for a chip multiprocessor (context) - Hammond, Willey et al. - 1998
3: Trace Scheduling: A Technique for Global Microcode Compaction (context) - Fisher - 1981
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BibTeX entry: (Update)
C. Zilles. Master/Slave Speculative Parallelization and Approximate Code. PhD thesis, Computer Sciences Department, University of Wisconsin--Madison, Aug. 2002. http://citeseer.ist.psu.edu/slave02masterslave.html More
@misc{ zilles02masterslave,
author = "Craig B. Zilles",
title = "Master/slave Speculative Parallelization And Approximate Code",
text = "C. Zilles. Master/Slave Speculative Parallelization and Approximate Code.
PhD thesis, Computer Sciences Department, University of Wisconsin--Madison,
Aug. 2002.",
year = "2002",
url = "citeseer.ist.psu.edu/slave02masterslave.html" }
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76 Will physical scalability sabotage performance gains - Matzke - 1997
74 Speculative Versioning Cache - Gopal, Vijaykumar et al. - 1998
72 Dynamic memory disambiguation using the memory conflict buff.. - Gallagher, Chen et al. - 1994
72 Data Speculation Support for a Chip Multiprocessor (context) - Hammond, Willey et al. - 1998
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35 Value Profiling and Optimization - Calder, Feller et al. - 1999
35 Execution-based Prediction Using Speculative Slices - Zilles, Sohi - 2001
32 Sentinel scheduling: A model for compiler-controlled specula.. (context) - Mahlke, Chen et al. - 1993
32 Storageless Value Prediction Using Prior Register Values - Tullsen, Seng - 1999
31 Understanding the Backwards Slices of Performance Degrading .. - Zilles, Sohi - 2000
30 Decoupled AccesExecute Computer Architecture (context) - Decoupled, Computer et al. - 1982
28 Slipstream Processors: Improving both Performance and Fault .. - Sundaramoorthy, Purser et al. - 2000
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25 a Profile-Directed Binary Translator (context) - Chernoff, Herdeg et al. - 1998
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23 Writing Efficient Programs (context) - Bentley - 1982
22 Optimizing Alpha Executables on Windows NT with Spike - Cohn, Goodwin et al. - 1997
22 Value speculation scheduling for high performance processors - Fu, Jennings et al. - 1998
21 Task Selection for a Multiscalar Processor - Vijaykumar, Sohi - 1998
21 PEWs: A Decentralized Dynamic Scheduler for ILP Processing (context) - Kemp, Franklin - 1996
20 ACM Transactions on Programming Languages and Systems (context) - George, Appel et al. - 1996
19 Architectural Support for Thread-Level Data Speculation - Steffan, Colohan et al. - 1997
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15 rePLay: A Hardware Framework for Dynamic Optimization (context) - Patel, Lumetta - 2001
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14 A hardware mechanism for dynamic extraction and relayout of .. - Merten, Trick et al. - 2000
12 Slice Processors: An Implementation of Operation-Based Predi.. (context) - Moshovos, Pnevmatikatos et al. - 2001
10 Architecture of the Atlas Chip-Multiprocessor: Dynamically P.. - Codrescu, Wills et al. - 2001
10 Improving Value Communication for Thread-Level Speculation - Steffan, Colohan et al. - 2000
8 Performance Characterization of a Hardware Framework for Dyn.. (context) - Fahs, Bose et al. - 2001
8 Dynamic Points-To Sets: A Comparison with Static Analyses an.. - Mock, Das et al. - 2001
4 Trace Processors: Exploiting Hierarchy and Speculation - Rotenberg - 1999
4 The Potential of Data Value Speculation to Boost ILP (context) - Gonzlez, Gonzlez - 1998
3 Speculative Data Driven Sequencing for Imperative Programs (context) - Roth, Sohi - 2000
2 Dynamic Vectorization: A Mechanism for Exploiting Far-flung .. - Vajapeyam, Mitra - 1999
1 Pre-Execution via Speculative Data-Driven Multithreading (context) - Roth - 2001
1 Technical Report MSR-TR (context) - Ball, Larus et al. - 1999
1 Dynamic Memory Disambiguation in the Presence of Out-of-orde.. - Onder, Gupta - 1999
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