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Abstract: First, the limits of low-level parallelism for a collection of real-world programs are investigated and Wall's results are verified. Maximum parallelism of symbolic benchmarks is investigated on both superpipelined and superscalar architectures. Effects of register renaming are considered. We then examine the effects of garbage collection strategies on low-level parallelism. In particular, we examine whether a garbage collector should optimize for CAR or CDR accesses. We also consider another... (Update)
Context of citations to this paper: More
.... and measurement methodology of [27] Our simulator uses emulationbased, instruction level simulation, and borrows significantly from MIPSI [22], a MIPS based simulator. The simulator executes unmodified Alpha object code and models the execution pipelines, memory hierarchy,...
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BibTeX entry: (Update)
E.G. Sirer. Measuring limits of fine-grained parallelism. Senior Independent Work, Princeton University, June 1993. http://citeseer.ist.psu.edu/sirer97measuring.html More
@misc{ sirer93measuring,
author = "E. Sirer",
title = "Measuring limits of fine-grained parallelism",
text = "E.G. Sirer. Measuring limits of fine-grained parallelism. Senior Independent
Work, Princeton University, June 1993.",
year = "1993",
url = "citeseer.ist.psu.edu/sirer97measuring.html" }
Citations (may not include all citations):521 Compiling with Continuations (context) - Appel - 1992
230 Limits of instruction-level parallelism - Wall - 1991
222 MIPS RISC Architecture (context) - Kane, Heinrich - 1992
157 Limits of control flow on parallelism - Lam, Wilson - 1992
25 Callee-save registers in continuation-passing style - Appel - 1992
24 the limits of program parallelism and its smoothability - Theobald, Gao et al. - 1992
21 The nonuniform distribution of instruction-level and machine.. (context) - Jouppi - 1989
4 and Robin Milner (context) - Harper, MacQueen - 1985
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