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Abstract: This paper examines implementation techniques for future generations of microprocessors. While the wide superscalar approach, which issues 8 and more instructions per cycle from a single thread, fails to yield a satisfying performance, its combination with techniques that utilize more coarse-grained parallelism is very promising. These techniques are multithreading and multiprocessing. Multithreaded superscalar permits several threads to issue instructions to the execution units of a wide... (Update)
Context of citations to this paper: More
...focuses on the identification and avoidance of bottlenecks in the multithreaded superscalar processor. Further simulations, shown in [3], install the same base processor in a multiprocessor chip and compare it with the multithreaded superscalar approach. 2 The Multithreaded...
...4. 3 Simultaneous multithreading or multithreaded superscalar The simultaneous multithreading or multithreaded superscalar approach [152,194,195,221,222] combines a wide issue superscalar instruction dispatch with the multiple context approach by providing several register...
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BibTeX entry: (Update)
Sigmund, U., Ungerer, Th.: Evaluating A Multithreaded Superscalar Microprocessor Versus a Multiprocessor Chip. Proc. of the 4 th PASA Workshop--Parallel Systems and Algorithms. Forschungszentrum Jülich, Germany, World Scientific Publishing, April 10-12, 1996, 147-159. http://citeseer.ist.psu.edu/sigmund96evaluating.html More
@misc{ sigmund96evaluating,
author = "U. Sigmund",
title = "Evaluating A Multithreaded Superscalar Microprocessor Versus a Multiprocessor
Chip",
text = "Sigmund, U., Ungerer, Th.: Evaluating A Multithreaded Superscalar Microprocessor
Versus a Multiprocessor Chip. Proc. of the 4 th PASA Workshop--Parallel
Systems and Algorithms. Forschungszentrum Jülich, Germany, World Scientific
Publishing, April 10-12, 1996, 147-159.",
year = "1996",
url = "citeseer.ist.psu.edu/sigmund96evaluating.html" }
Citations (may not include all citations):358 The Tera Computer System - Alverson - 1990
212 The MIT Alewife Machine: Architecture and Performance - Agarwal - 1995
28 Patterson: Computer Architecture a Quantitative Approach (context) - Hennessy - 1996
5 Levy: Simultaneous Multithreading: Maximizing On-Chip Parall.. (context) - Tullsen, Eggers - 1995
2 University of Karlsruhe (context) - Sigmund, of et al. - 1995
1 Multimedia Video Processor (context) - Instruments, Technical - 1994
1 Ungerer: Identifying Bottlenecks in Multithreaded Superscala.. (context) - Sigmund
1 Shen: Performance Evaluation of the PowerPC 620 Microprocess.. (context) - Diep, Nelson - 1995
1 Chang: The PowerPC 604 RISC Microprocessor (context) - Song, Denman - 1994
1 Ungerer: Towards Extremely Fast Context Switching in a Block.. (context) - Gruenewald - 1996
Documents on the same site (http://goethe.ira.uka.de/people/ungerer/Multithreaded-superscalar.html):
Identifying Bottlenecks in a Multithreaded Superscalar.. - Sigmund, Ungerer (1996) (Correct)
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