Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna  Home/Search
Context Related
| usc.edu/./pubs/sidhu_fpga99.ps Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF From: usc.edu/pubs (more) (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: FPGAs can perform better than ASICs if the logic mapped onto them is optimized for each problem instance. Unfortunately, this advantage is often canceled by the long time needed by CAD tools to generate problem instance dependent logic and the time required to configure the FPGAs. In this paper, a novel approach for runtime mapping is proposed that utilizes self-reconfigurability of multicontext FPGAs to achieve very high speedups over existing approaches. The key idea is to design and map... (Update)
Context of citations to this paper: More
...autonomously. Implementations based on self reconfiguration promise significant speed up compared with conventional approaches [7, 8]. Self reconfiguration was first introduced in [4, 5] In [7, 8] self reconfiguration was proposed to be realized by altering the...
...parallelism of FPGAs. Previous work in string matching using FPGAs has primarily focused on searching for a speci c string [3] [5]. Attempts at regular expression matching using FPGAs have been based on DFAs and su er form the same ineciencies as serial machine...
Cited by: More
A Computationally-efficient Engine for Flexible Intrusion.. - Baker, Prasanna (Correct)
(Self-)reconfigurable Finite State Machines: Theory and.. - Köster, Teich (2002) (Correct)
Efficient Metacomputation using Self-Reconfiguration - Sidhu, Prasanna (2002) (Correct)
Active bibliography (related documents): More All
0.2: Low-Power Design of Page-Based Intelligent Memory - Oskin, Chong, Farooqui.. (Correct)
0.2: Reducing Cost and Tolerating Defects in Page-based.. - Oskin, Keen.. (Correct)
0.2: Balancing Computation and Memory in High Capacity.. - Perissakis (2000) (Correct)
Similar documents based on text: More All
0.5: Fast Regular Expression Matching using FPGAs - Sidhu, Prasanna (2001) (Correct)
0.4: A Self-Reconfigurable Gate Array Architecture - Sidhu, Wadhwa, Mei, Prasanna (2000) (Correct)
0.3: Exploiting Reconfigurability for Effective Detection of Delay.. - Krasniewski (2000) (Correct)
Related documents from co-citation: More All
4: A Time-Multiplexed FPGA (context) - Trimberger, Carberry et al. - 1997
3: A self-reconfiguring processor (context) - French, Taylor - 1993
3: Genetic programming using selfreconfigurable fpgas (context) - Sidhu, Mei et al. - 1999
BibTeX entry: (Update)
R.P.S. Sidhu, A. Mei, and V.K. Prasanna. String Matching on Multicontext FPGAs using SelfReconfiguration. In ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Feb 1999. http://citeseer.ist.psu.edu/sidhu99string.html More
@inproceedings{ sidhu99string,
author = "R. P. S. Sidhu and A. Mei and V. K. Prasanna",
title = "String Matching on Multicontext {FPGA}s using Self-Reconfiguration",
booktitle = "{ACM}/{SIGDA} International Symposium on Field Programmable Gate Arrays",
publisher = "ACM Press",
address = "Monterey, CA",
editor = "S. Kaptanoglu and S. Trimberger",
pages = "217--226",
year = "1999",
url = "citeseer.ist.psu.edu/sidhu99string.html" }
Citations (may not include all citations):3972 Introduction to Algorithms (context) - CORMEN, LEISERSON et al. - 1990
59 DPGA-coupled microprocessors: Commodity ICs for the early 21.. - DEHON - 1994
58 A time-multiplexed FPGA (context) - TRIMBERGER, CARBERRY et al. - 1997
33 The design and implementation of a context switching FPGA (context) - SCALERA, AZQUEZ - 1998
21 Solving graph problems with dynamic computation structures - BABB, FRANK et al. - 1996
18 A selfreconfiguring processor (context) - FRENCH, TAYLOR - 1993
15 Self modifying circuitry - a platform for tractable virtual .. - DONLIN - 1998
13 A time-multiplexed FPGA architecture for logic emulation - JONES, LEWIS - 1995
12 Assessing document relevance with run-time reconfigurable ma.. (context) - GUNTHER, MILNE et al. - 1996
7 An embedded DRAM-FPGA chip with instantaneous logic reconfig.. (context) - MOTOMURA, AIMOTO et al. - 1998
7 An embedded DRAM-FPGA chip with instantaneous logic reconfig.. (context) - MOTOMURA, AIMOTO et al. - 1997
6 Accelerate FPGA macros with one-hot approach (context) - KNAPP - 1990
4 Multicontext Field-Programmable Gate Arrays (context) - DEHON
1 Accelerating boolean satifiability with configurable hardwar.. (context) - ZHONG, MARTONOSI et al. - 1998
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://maarc.usc.edu/pubs.html): More
Dynamic Precision Management for Loop Computations on.. - Bondalapati, Prasanna (1999) (Correct)
Mapping Homogeneous Computations onto Dynamically.. - Andreas Dandalis (1998) (Correct)
Fast Parallel Implementation of DFT Using Configurable Devices - Dandalis, Prasanna (1997) (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC