In this paper we present a network interface for an on-chip network. Our network interface decouples computation from communication by offering a shared-memory abstraction, which is independent of the network implementation. We use a transactionbased protocol to achieve backward compatibility with existing bus protocols such as AXI, OCP and DTL. Our network interface has a modular architecture, which allows flexible instantiation. It provides both guaranteed and best-effort services via connections. These are configured via network interface ports using the network itself, instead of a separate control interconnect. An example instance of this network interface with 4 ports has an area of 0.143mm in a 0.13m technology, and runs at 500 MHz.

Abstract—In this paper, we present a network interface (NI) for an on-chip network. Our NI decouples computation from communication by offering a shared-memory abstraction, which is independent of the network implementation. We use a transactionbased protocol to achieve backward compatibility with existing bus protocols such as AXI, OCP, and DTL. Our NI has a modular architecture, which allows flexible instantiation. It provides both guaranteed and best-effort services via connections. These are configured via NI ports using the network itself, instead of a separate control interconnect. An example instance of this NI with four ports has an area of 0.25 mmP after layout in 0.13- m technology, and runs at 500 MHz. Index Terms—Best-effort communication, communication protocols, network interfaces, networks on chip, packet switching, performance guarantees. I.

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this paper is not finding a better mode of operation for Myrinet, if not a way to probe that the VIA is a good concept and it can be used in SANs. Having this in mind, it will be only a matter of transport or multiply by a factor of performance improvement of whatever is found from now on. The first measurement made consists of the Latency with and without the VI, the RAW-Myrinet represents the application without the VI overhead, or bulk data transfers and the VI-Myrinet represents the Latency of the ECHO/Reply Round trip divided by two. Figure 3. Latency measurements with myrinet using raw data and the VI on the top of the myrinet