This paper describes a new BDD-based logic optimization system, BDS. It is based on a recently developed theory for BDD-based logic decomposition, which supports both algebraic and Boolean factorization. New techniques, which are crucial to the manipulation of BDDs in a partitioned Boolean network environment, are described in detail. The experimental results show that BDS has a capability to handle very large circuits. It offers a superior runtime advantage over SIS, with comparable results in terms of circuit area and often improved delay.

In this paper, the preliminary results of mixed CMOS/PTL circuit synthesis are presented. Our synthesis method is based on a newly developed logic optimization method [1]. The experimental results show that CMOS/PTL circuits achieve heavy reduction on area. I. INTRODUCTION There are two major approaches to the synthesis of logic circuits, each targeting different technology. One is based on a predominantly algebraic factorization leading to AND/OR logic decompositions [2], [3]. The synthesis process is broken into technology independent optimization and technology mapping targeting static CMOS. Neither logic optimization nor technology mapping has a capability to handle XOR or MUX structures. The other approach, which is relatively new, targets pass transistor logic (PTL), which can potentially generate smaller and more power-efficient circuits [4]. Current methods for PTL synthesis are all based on direct BDD mapping [4], [5], [6], [7]. While these methods have achieved certain degr...

Abstract — We address the problem of synthesizing pass transistor logic (PTL), with the specific objective of delay reduction, through binary decision diagram (BDD) decomposition. The decomposition is performed by mapping the BDD to a network flow graph, and then applying the max-flow min-cut technique to bipartition the BDD optimally under a cost function that measures the delay and area of the decomposed implementations. Experimental results obtained by running our algorithm on the set of ISCAS’85 benchmarks show a 31 % improvement in delay and a 30 % improvement in area, on an average, as compared to static CMOS implementations for xor intensive circuits, while in case of arithmetic logic unit and control circuits that are nand intensive, improvements over static CMOS are small and inconsistent.

The article presents methods of dealing with huge data in the domain of neural networks. The decomposition of neural networks is introduced and its efficiency is proved by the authors ’ experiments. The examinations of the effectiveness of argument reduction in the above filed, are presented. Authors indicate, that decomposition is capable of reducing the size and the complexity of the learned data, and thus it makes the learning process faster or, while dealing with large data, possible. According to the authors experiments, in some cases, argument reduction, makes the learning process harder.

Abstract — This paper presents a heuristic algorithm for disjoint decomposition of a Boolean function based on its ROBDD representation. Two distinct features make the algorithm feasible for large functions. First, for an n-variable function, it checks only O(n 2) candidates for decomposition out of O(2 n) possible ones. A special strategy for selecting candidates makes it likely that all other decompositions are encoded in the selected ones. Second, the decompositions for the approved candidates are computed using a novel IntervalCut algorithm. This algorithm does not require re-ordering of ROBDD. The combination of both techniques allows us to decompose the functions of size beyond that possible with the exact algorithms. The experimental results on 582 benchmark functions show that the presented heuristic finds 95 % of all decompositions on average. For 526 of those functions, it finds 100 % of the decompositions. I.

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t all types of atomic decompositions and their corresponding BDD structures can be easily identified. Type BDD Structure Decomposition 1 1-dominator algebraic AND 2 0-dominator algebraic OR 3 x-dominator algebraic XOR/XNOR 4 generalized dominator Boolean AND/OR 5 generalized x-dominator Boolean XOR/XNOR 6 cofactor wrt. single node simple MUX 7 cofactor wrt. super node functional MUX TABLE I BDD DECOMPOSITIONS IN [4] Note that the direct BDD mapping can be seen as a process of performing simple MUX decomposition with respect to each BDD node. As such, it corresponds to decomposition type 6 in Table I. It should also be noted that the remapping technique in [5] is a subset of type 1 and 2. Therefore, our BDD decomposition method is more general than all previously reported methods. I. IMPLEMENTATIONAND RESULTS A new tool, BDDlopt.ptl, has been developed by adding the MUX decomposition capability to BDDlopt [4]. A BDD is iteratively decomposed by finding the best decompositio