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Logical reliability of interacting real-time tasks
- In Proc. DATE
, 2008
"... We propose the notion of logical reliability for real-time program tasks that interact through periodically updated program variables. We describe a reliability analysis that checks if the given short-term (e.g., single-period) reliability of a program variable update in an implementation is suffici ..."
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Cited by 5 (5 self)
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We propose the notion of logical reliability for real-time program tasks that interact through periodically updated program variables. We describe a reliability analysis that checks if the given short-term (e.g., single-period) reliability of a program variable update in an implementation is sufficient to meet the logical reliability requirement (of the program variable) in the long run. We then present a notion of design by refinement where a task can be refined by another task that writes to program variables with less logical reliability. The resulting analysis can be combined with an incremental schedulability analysis for interacting real-time tasks proposed earlier for the Hierarchical Timing Language (HTL), a coordination language for distributed real-time systems. We implemented a logical-reliabilityenhanced prototype of the compiler and runtime infrastructure for HTL. 1
Design optimization of time- and cost-constrained fault-tolerant distributed embedded systems
- Design, Automation and Test in
, 2005
"... Abstract—We present an approach to the synthesis of fault-tolerant hard real-time systems for safety-critical applications. We use checkpointing with rollback recovery and active replication for tolerating transient faults. Processes and communications are statically scheduled. Our synthesis approac ..."
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Cited by 4 (1 self)
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Abstract—We present an approach to the synthesis of fault-tolerant hard real-time systems for safety-critical applications. We use checkpointing with rollback recovery and active replication for tolerating transient faults. Processes and communications are statically scheduled. Our synthesis approach decides the assignment of fault-tolerance policies to processes, the optimal placement of checkpoints and the mapping of processes to processors such that multiple transient faults are tolerated and the timing constraints of the application are satisfied. We present several design optimization approaches which are able to find fault-tolerant implementations given a limited amount of resources. The developed algorithms are evaluated using extensive experiments, including a real-life example. Index Terms—Fault tolerance, processor scheduling, real time systems, redundancy. I.
Scheduling of Fault-Tolerant Embedded Systems with Soft and Hard Time Constraints
, 2008
"... In this paper we present an approach to the synthesis of fault-tolerant schedules for embedded applications with soft and hard real-time constraints. We are interested to guarantee the deadlines for the hard processes even in the case of faults, while maximizing the overall utility. We use time/util ..."
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Cited by 4 (2 self)
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In this paper we present an approach to the synthesis of fault-tolerant schedules for embedded applications with soft and hard real-time constraints. We are interested to guarantee the deadlines for the hard processes even in the case of faults, while maximizing the overall utility. We use time/utility functions to capture the utility of soft processes. Process re-execution is employed to recover from multiple faults. A single static schedule computed off-line is not fault tolerant and is pessimistic in terms of utility, while a purely online approach, which computes a new schedule every time a process fails or completes, incurs an unacceptable overhead. Thus, we use a quasi-static scheduling strategy, where a set of schedules is synthesized off-line and, at run time, the scheduler will select the right schedule based on the occurrence of faults and the actual execution times of processes. The proposed schedule synthesis heuristics have been evaluated using extensive experiments. 1.
Workshop on Visual Modeling for Software Intensive Systems
- Procedings of 2005 IEEE Symposium on Visual Languages and Human-Centric Computing (VL/HCC’05
, 2005
"... Visual modeling techniques play an important role in the design and understanding of complex, ..."
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Cited by 3 (0 self)
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Visual modeling techniques play an important role in the design and understanding of complex,
Sangiovanni-Vincentelli,A.: A Formal Approach to Fault Tree Synthesis for the Analysis of Distributed Fault Tolerant Systems
- Procs. of the 5th ACM International Conference on Embedded Software
, 2005
"... Designing cost-sensitive real-time control systems for safetycritical applications requires a careful analysis of both performance versus cost aspects and fault coverage of fault tolerant solutions. This further complicates the difficult task of deploying the embedded software that implements the co ..."
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Cited by 2 (0 self)
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Designing cost-sensitive real-time control systems for safetycritical applications requires a careful analysis of both performance versus cost aspects and fault coverage of fault tolerant solutions. This further complicates the difficult task of deploying the embedded software that implements the control algorithms on a possibly distributed execution platform (for instance in automotive applications). In this paper, we present a novel technique for constructing a fault tree that models how component faults may lead to system failure. The fault tree enables us to use existing commercial analysis tools to assess a number of dependability metrics of the system. Our approach is centered on a model of computation, Fault Tolerant Data Flow (FTDF), that enables the integration of formal verification techniques. This new analysis capability is added to an existing design framework, also based on FTDF, that enables a synthesis-based, correctby-construction, design methodology for the deployment of real-time feedback control systems in safety critical applications. Categories and Subject Descriptors J.6 [Computer-Aided Engineering]: Computer-aided design
Synthesis of Fault-Tolerant Embedded Systems
"... This work addresses the issue of design optimization for faulttolerant hard real-time systems. In particular, our focus is on the handling of transient faults using both checkpointing with rollback recovery and active replication. Fault tolerant schedules are generated based on a conditional process ..."
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Cited by 1 (0 self)
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This work addresses the issue of design optimization for faulttolerant hard real-time systems. In particular, our focus is on the handling of transient faults using both checkpointing with rollback recovery and active replication. Fault tolerant schedules are generated based on a conditional process graph representation. The formulated system synthesis approaches decide the assignment of fault-tolerance policies to processes, the optimal placement of checkpoints and the mapping of processes to processors, such that multiple transient faults are tolerated, transparency requirements are considered, and the timing constraints of the application are satisfied. 1.
FTOS-Verify: Analysis and Verification of Non-Functional Properties for Fault-Tolerant Systems
, 905
"... ..."
Abstract Sri Kanajan General Motors
"... Designing cost-sensitive real-time control systems for safetycritical applications requires a careful analysis of both performance versus cost aspects and fault coverage of fault-tolerant solutions. This further complicates the difficult task of deploying the embedded software that implements the co ..."
Abstract
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Designing cost-sensitive real-time control systems for safetycritical applications requires a careful analysis of both performance versus cost aspects and fault coverage of fault-tolerant solutions. This further complicates the difficult task of deploying the embedded software that implements the control algorithms on a possibly distributed execution platform (as it is typical, for instance, for automotive applications). In this paper, we present a novel technique for building a fault tree that models how component faults may lead to system failure. The fault tree enables us to use existing commercial analysis tools to assess a number of dependability metrics of the system. Our approach is centered around a model of computation, Fault Tolerant Data Flow (FTDF), that enables the integration of formal verification techniques. This new analysis capabilities are added to an existing design framework, also based on FTDF, that enables a synthesisbased, correct-by-construction, design methodology for the deployment of real-time feedback control systems for safety critical applications. 1
Synthesis of Flexible Fault-Tolerant Schedules with Preemption for Mixed Soft and Hard Real-Time Systems
"... In this paper we present an approach for scheduling with preemption for fault-tolerant embedded systems composed of soft and hard real-time processes. We are interested to maximize the overall utility for average, most likely to happen, scenarios and to guarantee the deadlines for the hard processes ..."
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In this paper we present an approach for scheduling with preemption for fault-tolerant embedded systems composed of soft and hard real-time processes. We are interested to maximize the overall utility for average, most likely to happen, scenarios and to guarantee the deadlines for the hard processes in the worst case scenarios. In many applications, the worst-case execution times of processes can be much longer than their average execution times. Thus, designs for the worst-case can be overly pessimistic, i.e., result in low overall utility. We propose preemption of process executions as a method to generate flexible schedules that maximize the overall utility for the average case while guarantee timing constraints in the worst case. Our scheduling algorithms determine off-line when to preempt and when to resurrect processes. The experimental results

