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Parallel Numerical Linear Algebra
, 1993
"... We survey general techniques and open problems in numerical linear algebra on parallel architectures. We first discuss basic principles of parallel processing, describing the costs of basic operations on parallel machines, including general principles for constructing efficient algorithms. We illust ..."
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Cited by 773 (23 self)
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We survey general techniques and open problems in numerical linear algebra on parallel architectures. We first discuss basic principles of parallel processing, describing the costs of basic operations on parallel machines, including general principles for constructing efficient algorithms. We illustrate these principles using current architectures and software systems, and by showing how one would implement matrix multiplication. Then, we present direct and iterative algorithms for solving linear systems of equations, linear least squares problems, the symmetric eigenvalue problem, the nonsymmetric eigenvalue problem, and the singular value decomposition. We consider dense, band and sparse matrices.
Automated Parallelization of Timed PetriNet Simulations
 Journal of Parallel and Distributed Computing
, 1995
"... Timed Petrinets are used to model numerous types of large complex systems, especially computer architectures and communication networks. While formal analysis of such models is sometimes possible, discreteevent simulation remains the most general technique available for assessing the model's ..."
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Cited by 15 (3 self)
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Timed Petrinets are used to model numerous types of large complex systems, especially computer architectures and communication networks. While formal analysis of such models is sometimes possible, discreteevent simulation remains the most general technique available for assessing the model's behavior. However, simulation's computational requirements can be massive, especially on the large complex models that defeat analytic methods. One way of meeting these requirements is by executing the simulation on a parallel machine. This paper describes simple techniques for the automated parallelization of timed Petrinet simulations. We address both the issue of processor synchronization, as well as the automated mapping, static and dynamic, of the Petrinet to the parallel architecture. As part of this effort we describe a new mapping algorithm, one that also applies to more gen al parallel computations. We establish analytic properties of the solution produced by the algorithm, including optimality on some regular topologies. The viability of our integrated approach is demonstrated empirically on the Intel iPSC/860 and Delta architectures using many processors. Excellent performance is
Reliable Omega Interconnected Network for Large Scale Multiprocessor Systems”, Computer Journal (for publication
, 2002
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Selection and Assignment of Machines: a Parallel Approach
"... In this paper, a twophase method is presented for selection of machines to be kept on the shop floor and assignment of parts to be manufactured on these machines. In the first phase, dynamic programming or a heuristic procedure identifies a set of feasible solutions to a knapsack problem. In the se ..."
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In this paper, a twophase method is presented for selection of machines to be kept on the shop floor and assignment of parts to be manufactured on these machines. In the first phase, dynamic programming or a heuristic procedure identifies a set of feasible solutions to a knapsack problem. In the second phase, implicit enumeration technique or a greedy algorithm solves an assignment problem. The proposed method is written in language C and runs on a parallel virtual machine called PVMW95. The results obtained from the parallel implementation on several examples which are found in the literature, as well as examples generated at random, were used to establish a comparison with the sequential algorithm and to perform a speedup analysis.
Original Research Article FUNCTIONING EFFICIENTLY USING PARALLEL COMPUTING
"... Parallel Computing is very wideranging and large topic. It basically means use of multiple processors or computers working together on a common task. Parallel computing is the simultaneous use of multiple compute resources to solve a computational problem. This paper consists of a conversation on p ..."
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Parallel Computing is very wideranging and large topic. It basically means use of multiple processors or computers working together on a common task. Parallel computing is the simultaneous use of multiple compute resources to solve a computational problem. This paper consists of a conversation on parallel computing what it is and where it's used, followed by a discussion on concepts connected with parallel computing. The subject dependencies, Flynn’s taxonomy are then explored. These topics are followed by types of parallelism hardware parallelism and software parallelism.
Effects of Trends in Disk Technology on Disk Arrays
"... this paper is organized as follows. In x2, we briey describe disks, trends in disk technology, and the disk array architectures which we analyze. In x3, we derive algebraic expressions for the performance of the disk array models. In x4, we discuss the eects of incremental changes in disk technology ..."
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this paper is organized as follows. In x2, we briey describe disks, trends in disk technology, and the disk array architectures which we analyze. In x3, we derive algebraic expressions for the performance of the disk array models. In x4, we discuss the eects of incremental changes in disk technology on disk array performance. Finally, in x??, we conclude with a summary of our results and oer directions for future research. 2 Disk Architectures and Models
Index Terms: Applicationspecific
"... Platform Multicore Processor, Complex Programmable Logic Devices (CPLDs) ApplicationSpecific Integrated Circuit (ASIC), Graphic Processing Unit(GPU), Vector Processor, Massively parallel processor (MPP), and Symmetric Multiprocessor (SMP) have become key components for dealing with parallel applica ..."
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Platform Multicore Processor, Complex Programmable Logic Devices (CPLDs) ApplicationSpecific Integrated Circuit (ASIC), Graphic Processing Unit(GPU), Vector Processor, Massively parallel processor (MPP), and Symmetric Multiprocessor (SMP) have become key components for dealing with parallel applications. Within parallel computing, there is a specialized parallel device called Field Programmable Array (FPGA) remain niche areas of interest. While not domainspecific, it tends to be applicable to only a few classes of parallel problems. This research work explores the underlying parallel architecture of this Field Programmable Gate Array (FPGA). The design methodology, the design tools for implementing FPGAs is discussed e.g. System Generator from Xilinx, Impulse C programming model etc. FPGA design in compares with other technology) is envisaged. In this research work FPGA typically exploits parallelism because FPGA is a parallel device. With the use of simulation tool, Impulse Codeveloper (Impulse C), FPGA platform graphical tools that provide initial estimates of algorithm throughput such as loop latencies and pipeline effective rates are generated. Using such tools, you can interactively change optimization options or iteratively modify and recompile C code to obtain higher performance.