This paper describes the evolution of the Portals message passing architecture and programming interface from its initial development on tightly-coupled massively parallel platforms to the current implementation running on a 1792-node commodity PC Linux cluster. Portals provides the basic building blocks needed for higher-level protocols to implement scalable, low-overhead communication. Portals has several unique characteristics that differentiate it from other high-performance system-area data movement layers. This paper discusses several of these features and illustrates how they can impact the scalability and performance of higher-level message passing protocols.

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Most of existing multithreaded environments have an implementation built on top of standard communication interfaces such as MPI which ensures a high level of portability. However, such interfaces do not meet the eÆciency needs of RPC-like communications which are extensively used in multithreaded environments. We propose a new portable and eÆcient communication interface for RPC-based multithreaded environments, called Madeleine. We describe its programming interface and its implementation on top of low-level network protocols such as VIA. We also report performance results that demonstrate the eÆciency of our approach. Keywords: Multithreading, Remote Procedure Call, High Speed Networks, VIA Resume Bon nombre d'environnements multithreads possedent une implantation s'appuyant des bibliotheques de communication standard telles MPI, ce qui leur confere un haut degre de portabilite. Cependant, ces interfaces ne repondent pas aux exigences d'eÆcacite des communications de type...

This paper analyzes the scalability limitations of networking technologies based on the Virtual Interface Architecture (VIA) in supporting the runtime environment needed for an implementation of the Message Passing Interface. We present an overview of the important characteristics of VIA and an overview of the runtime system being developed as part of the Computational Plant (Cplant) project at Sandia National Laboratories. We discuss the characteristics of VIA that prevent implementations based on this system to meet the scalability and performance requirements of Cplant.

Modern desktop and server computer systems use multiple processors: general purpose CPU(s), graphic processor (GPU), network processors (NP) on Network Interface Cards (NICs), RAID controllers, and signal processors on sound cards and modems. Some of these processors traditionally have been special purpose processors but there is a trend towards replacing some of these with embedded general purpose processors. At the same time main CPUs become more powerful; desktop CPUs start featuring Simultaneous Multi-Threading (SMT); and Symmetric Multi-Processing (SMP) systems are widely used in server systems. However, the structure of operating systems has not really changed to reflect these trends --- different types of processors evolve at different timescales (largely driven by market forces) requiring significant changes to operating systems kernels to reflect the appropriate tradeoffs.

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Offloading protocol processing will become an important tool in supporting our efforts to deliver increasing bandwidth to applications. In this paper we describe our experience in offloading protocol processing to a programmable gigabit Ethernet network interface card. For our experiments, we selected a simple RTS/CTS (request to send/clear to send) protocol called RMPP (Reliable Message Passing Protocol). This protocol provides endto-end flow control and full message retransmit in the case of a lost or corrupt packet. By carefully selecting parts of the protocol for offloading, we were able to improve the bandwidth delivered to MPI applications from approximately 280 Mb/s to approximately 700 Mb/s using standard, 1500 byte, Ethernet frames. Using “jumbo”, 9000 byte, frames the bandwidth improves from approximately 425 Mb/s to 840 Mb/s. Moreover, we were able to show a significant increase in the availability of the host processor. 1

Recent developments in networking technology and rise in cluster computing have driven many research studies in high performance communication architectures. The so--called Virtual Interface Architecture (VIA) seeks to provide an operating system independent infrastructure for high--performance user--level networking in a generic environment. Therefore it defines mechanisms for low--latency, high--bandwidth message communication style. Although low--latency is one of the major goals of VIA several research prototypes (software emulations) have shown that it couldn't be achieved satisfying until now. The Scalable Coherent Interface (SCI) is a high--speed cluster interconnect that offers extreme low latency based on distributed shared memory (DSM) facilities. Although initially not intended for message--passing style of communication it's well--suited for this purpose. Hence our idea is to combine the architectural principles of SCI and VIA. In this paper we describe some concepts of an ...

SCI becomes more and more accepted in the community of parallel computing, especially in case of Cluster Computing. At the moment Dolphin ICS is currently the leader in SCI Link Chip design as well as in PCI--SCI bridge manufacturing. Although raw performance of PCI-- SCI products increased a lot over the last years, the basic architecture of this hardware has not changed. However, there are several disadvantages with todays PCI--SCI bridges such as unhandy memory management and the missing facility to realize protected user--level DMA. From our point of view, the last one is one of the most important feature to add into a conventional PCI--SCI architecture since this can increase general system throughput by a significant amount. In this paper we want to present a new PCI--SCI bridge we are currently about to build up. Further we describe our new architectural concepts helping to improve current SCI architecture for cluster computing. Similar to the PCI--SCI bridges developed at the C...