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63
Timed unfoldings for networks of timed automata
 Research Rep. LSV0609, Lab. Spécification et Vérification, ENS de
, 2006
"... Abstract. Whereas partial order methods have proved their efficiency for the analysis of discreteevent systems, their application to timed systems remains a challenging research topic. Here, we design a verification algorithm for networks of timed automata with invariants. Based on the unfolding te ..."
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Abstract. Whereas partial order methods have proved their efficiency for the analysis of discreteevent systems, their application to timed systems remains a challenging research topic. Here, we design a verification algorithm for networks of timed automata with invariants. Based on the unfolding technique, our method produces a branching process as an acyclic Petri net extended with read arcs. These arcs verify conditions on tokens without consuming them, thus expressing concurrency between conditions checks. They are useful for avoiding the explosion of the size of the unfolding due to clocks which are compared with constants but not reset. Furthermore, we attach zones to events, in addition to markings. We then compute a complete finite prefix of the unfolding. The presence of invariants goes against the concurrency since it entails a global synchronization on time. The use of read arcs and the analysis of the clock constraints appearing in invariants helps increasing the concurrency relation between events. Finally, the finite prefix can be used to decide reachability properties, and transition enabling. 1
Partial order reduction for verification of timed systems
, 1999
"... conclusions or recommendations expressed in this material are those of the author and do not necessarily reflect the views of SRC, NSF, DARPA, or the United States Government. ..."
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conclusions or recommendations expressed in this material are those of the author and do not necessarily reflect the views of SRC, NSF, DARPA, or the United States Government.
On Checking Timed Automata for Linear Duration Invariants
 Proceedings of the 19th RealTime Systems Symposium RTSS'98
, 1998
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Algorithms For Synthesis And Verification Of Timed Circuits And Systems
, 1999
"... In order to increase performance, circuit designers are beginning to move away from traditional, synchronous designs based on static logic. Recent design examples have shown that significant performance gains are realized when aggressive circuit styles are used. Circuit correctness in these aggressi ..."
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Cited by 11 (2 self)
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In order to increase performance, circuit designers are beginning to move away from traditional, synchronous designs based on static logic. Recent design examples have shown that significant performance gains are realized when aggressive circuit styles are used. Circuit correctness in these aggressive circuit styles is highly timing dependent, and in industry they are typically designed by hand. In order to automate the process of designing and verifying timed circuits, algorithms to explore the reachable state space of the circuit under the timing constraints are necessary. This thesis presents a new specification method for timed circuits, timed event/level (TEL) structures, and new algorithms for exploring a timed state space. The TEL structure specification allows the designer to specify behavior controlled by signal transitions, which is best for representing sequencing, and behavior controlled by signal levels, which is best for representing gate level circuits. This thesis also...
A Compositional Translation of Stochastic Automata into Timed Automata
 University of Twente
, 2000
"... We present a translation from stochastic automata [17, 16] into timed automata with deadlines [37, 13]. The translation preserves traces when the stochastic characteristics, namely the probability measures, are abstracted from the original stochastic automaton. Moreover, we show that the translat ..."
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We present a translation from stochastic automata [17, 16] into timed automata with deadlines [37, 13]. The translation preserves traces when the stochastic characteristics, namely the probability measures, are abstracted from the original stochastic automaton. Moreover, we show that the translation is compositional in the sense that the translation of the parallel composition of two stochastic automata is equivalent to the parallel composition of the timed automata resulting from the translation of each stochastic automaton. The translation aims to borrow techniques and tools successfully developed in the context of timed automata and apply them to analyse the correctness of systems modelled in terms of stochastic automata.
Improved POSET timing analysis in Timed Petri Nets
 in Proceedings of International Workshop on Synthesis and System Integration of Mixed Technologies
, 2001
"... Abstract—This paper presents an improved timing algorithm for the analysis of timed Petri nets that is based on the POSET algorithm. The new algorithm reduces the number of redundant concurrent orderings the POSET algorithm explores by directly considering causal assignments. This paper shows that t ..."
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Abstract—This paper presents an improved timing algorithm for the analysis of timed Petri nets that is based on the POSET algorithm. The new algorithm reduces the number of redundant concurrent orderings the POSET algorithm explores by directly considering causal assignments. This paper shows that the new algorithm, when compared to the original POSET algorithm, results in an average 2.25 times improvement in runtime and a 57 % reduction in stored zones when applied to a suite of example circuits. Although the new algorithm can suffer an exponential increase in the number of causal assignments it must consider, this paper shows it to be a property of the POSET algorithm itself that does not happen often in practice. I.
Abstractions and Partial Order Reductions for Checking Branching Properties of Time Petri Nets
, 2001
"... The paper deals with verification of untimed branching time properties of Time Petri Nets. The atomic variant of the geometric region method for preserving properties of CTL and ACTL is improved. Then, it is shown, for the first time, how to apply the partial order reduction method to deal with next ..."
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Cited by 9 (3 self)
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The paper deals with verification of untimed branching time properties of Time Petri Nets. The atomic variant of the geometric region method for preserving properties of CTL and ACTL is improved. Then, it is shown, for the first time, how to apply the partial order reduction method to deal with nexttime free branching properties of Time Petri Nets. The above two results are combined offering an efficient method for model checking of ACTL X and CTL X properties of Time Petri Nets.
Correctness and Reduction in Timed Circuit Analysis
, 2002
"... To increase performance, circuit designers are experimenting with timed circuits  a class of circuits that rely on a complex set of timing constraints for correct functionality. This is evidenced in published experimental designs from industry. Timing constraints are key to the success of these de ..."
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Cited by 9 (1 self)
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To increase performance, circuit designers are experimenting with timed circuits  a class of circuits that rely on a complex set of timing constraints for correct functionality. This is evidenced in published experimental designs from industry. Timing constraints are key to the success of these designs, and algorithms to verify timing constraints are required to make them practical in commercial applications. Due to the complexity of the constraints, however, traditional static timing analysis is not adequate. Timed state space analysis is required; thus, improved timed state space analysis is paramount to producing efficient timed circuits. This diss
Partial Order Reduction for Verification of RealTime Components
"... Abstract. We describe a partial order reduction technique for a realtime component model. Components are described as timed automata with data ports, which can be composed in static structures of unidirectional control and data flow. Compositions can be encapsulated as components and used in other c ..."
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Abstract. We describe a partial order reduction technique for a realtime component model. Components are described as timed automata with data ports, which can be composed in static structures of unidirectional control and data flow. Compositions can be encapsulated as components and used in other compositions to form hierarchical models. The proposed partial order reduction technique uses a local time semantics for timed automata, in which time may progress independently in parallel automata which are resynchronized when needed. To increase the number of independent transitions and to reduce the problem of resynchronizing parallel automata we propose, and show how, to use information derived from the composition structure of an analyzed model. Based on these ideas, we present a reachability analysis algorithm that uses an ample set construction to select which symbolic transitions to explore. The algorithm has been implemented as a prototype extension of the realtime modelchecker Uppaal. We report from experiments with the tool that indicate that the technique can achieve substantial reduction in the time and memory needed to analyze a realtime system described in the studied component model. 1
Symbolic Unfoldings for Networks of Timed Automata
, 2006
"... Abstract. In this paper we give a symbolic concurrent semantics for network of timed automata (NTA) in terms of extended symbolic nets. Extended symbolic nets are standard occurrence nets extended with read arcs and symbolic constraints on places and transitions. We prove that there is a complete fi ..."
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Abstract. In this paper we give a symbolic concurrent semantics for network of timed automata (NTA) in terms of extended symbolic nets. Extended symbolic nets are standard occurrence nets extended with read arcs and symbolic constraints on places and transitions. We prove that there is a complete finite prefix for any NTA that contains at least the information of the simulation graph of the NTA but keep explicit the notions of concurrency and causality of the network. 1