In asynchronous circuit synthesis, the direct translation method, whereby circuits are derived from Petri net (PN) [1] specifications directly, has not evolved any automatic tools. This paper describes a design method based on direct translation techniques, incorporating refinement, optimization and an automatic tool. 1.

A testing method and on-chip testing circuits for our VLSI chip of asynchronous communication mechanism (ACM) using self-timed circuits are presented in this paper. The three properties of ACMs, asynchrony, coherence and freshness, are what we want to test. Besides these, the general function of the chip and data loss are also of interest. Although this work is a specific solution for a specific problem, it is an important step in the development of a methodology of testing hardware solutions of fully asynchronous systems.