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Noise Threshold for a FaultTolerant TwoDimensional Lattice Architecture
 Quant. Inf. Comp
"... We consider a model of quantum computation in which the set of operations is limited to nearestneighbor interactions on a 2D lattice. We model movement of qubits with noisy SWAP operations. For this architecture we design a faulttolerant coding scheme using the concatenated [[7, 1, 3]] Steane code ..."
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Cited by 24 (2 self)
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We consider a model of quantum computation in which the set of operations is limited to nearestneighbor interactions on a 2D lattice. We model movement of qubits with noisy SWAP operations. For this architecture we design a faulttolerant coding scheme using the concatenated [[7, 1, 3]] Steane code. Our scheme is potentially applicable to iontrap and solidstate quantum technologies. We calculate a lower bound on the noise threshold for our local model using a detailed failure probability analysis. We obtain a threshold of 1.85×10 −5 for the local setting, where memory error rates are onetenth of the failure rates of gates, measurement, and preparation steps. For the analogous nonlocal setting, we obtain a noise threshold of 3.61×10 −5. Our results thus show that the additional SWAP operations required to move qubits in the local model affect the noise threshold only moderately.
Interconnection Networks for Scalable Quantum Computers
 Intl. Symp. on Computer Architecture
, 2006
"... We show that the problem of communication in a quantum computer reduces to constructing reliable quantum channels by distributing highfidelity EPR pairs. We develop analytical models of the latency, bandwidth, error rate and resource utilization of such channels, and show that 100s of qubits must b ..."
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Cited by 14 (6 self)
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We show that the problem of communication in a quantum computer reduces to constructing reliable quantum channels by distributing highfidelity EPR pairs. We develop analytical models of the latency, bandwidth, error rate and resource utilization of such channels, and show that 100s of qubits must be distributed to accommodate a single data communication. Next, we show that a grid of teleportation nodes forms a good substrate on which to distribute EPR pairs. We also explore the control requirements for such a network. Finally, we propose a specific routing architecture and simulate the communication patterns of the Quantum Fourier Transform to demonstrate the impact of resource contention. 1.
Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing
"... The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, “seaofqubits ” architectures. The resulting architectures overcome the primary challenges of reliability and scalability at the cost of physically unacceptable system ..."
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Cited by 11 (3 self)
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The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, “seaofqubits ” architectures. The resulting architectures overcome the primary challenges of reliability and scalability at the cost of physically unacceptable system area. We find that by exploiting the natural serialization at both the application and the physical microarchitecture level of a quantum computer, we can reduce the area requirement while improving performance. In particular we present a scalable quantum architecture design that employs specialization of the system into memory and computational regions, each individually optimized to match hardware support to the available parallelism. Through careful application and system analysis, we find that our new architecture can yield up to a factor of thirteen savings in area due to specialization. In addition, by providing a memory hierarchy design for quantum computers, we can increase time performance by a factor of eight. This result brings us closer to the realization of a quantum processor that can solve meaningful problems.
Automated Generation of Layout and Control for Quantum Circuits
 In Proc. of ACM Intl. Conf. on Computing Frontiers
, 2007
"... We present a computeraided design flow for quantum circuits, complete with automatic layout and control logic extraction. To motivate automated layout for quantum circuits, we investigate gridbased layouts and show a performance variance of four times as we vary grid structure and initial qubit pl ..."
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Cited by 9 (3 self)
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We present a computeraided design flow for quantum circuits, complete with automatic layout and control logic extraction. To motivate automated layout for quantum circuits, we investigate gridbased layouts and show a performance variance of four times as we vary grid structure and initial qubit placement. We then propose two polynomialtime design heuristics: a greedy algorithm suitable for small, congestionfree quantum circuits and a dataflowbased analysis approach to placement and routing with implicit initial placement of qubits. Finally, we show that our dataflowbased heuristic generates better layouts than the stateoftheart automated gridbased layout and scheduling mechanism in terms of latency and potential pipelinability, but at the cost of some area. 1
Faulttolerant quantum computation for local leakage faults
 2005, quantph/0511065. THRESHOLD AGAINST BIASED NOISE 11
"... We provide a rigorous analysis of faulttolerant quantum computation in the presence of local leakage faults. We show that one can systematically deal with leakage faults by using socalled leakage reduction units such as quantum teleportation. We describe ways to limit the use of leakage reduction ..."
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Cited by 9 (2 self)
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We provide a rigorous analysis of faulttolerant quantum computation in the presence of local leakage faults. We show that one can systematically deal with leakage faults by using socalled leakage reduction units such as quantum teleportation. We describe ways to limit the use of leakage reduction while keeping the quantum circuits faulttolerant. We also show that measurementbased computation is inherently tolerant against leakage faults. 1
Abstract Running a Quantum Circuit at the Speed of Data
"... We analyze circuits for kernels from popular quantum computing applications, characterizing the hardware resources necessary to take ancilla preparation off the critical path. The result is a chip entirely dominated by ancilla generation circuits. To address this issue, we introduce optimized ancill ..."
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Cited by 7 (2 self)
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We analyze circuits for kernels from popular quantum computing applications, characterizing the hardware resources necessary to take ancilla preparation off the critical path. The result is a chip entirely dominated by ancilla generation circuits. To address this issue, we introduce optimized ancilla factories and analyze their structure and physical layout for ion trap technology. We introduce a new quantum computing architecture with highly concentrated dataonly regions surrounded by shared ancilla factories. The results are a reduced dependence on costly teleportation, more efficient distribution of generated ancillae and more than five times speedup over previous proposals. 1
Scheduling physical operations in a quantum information processor
 Proceedings of SPIE, 6244:62440T
, 2006
"... Please verify that (1) all pages are present, (2) all figures are acceptable, (3) all fonts and special characters are correct, and (4) all text and figures fit within the ..."
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Cited by 7 (1 self)
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Please verify that (1) all pages are present, (2) all figures are acceptable, (3) all fonts and special characters are correct, and (4) all text and figures fit within the
Tailoring quantum architectures to implementation style: A quantum computer for mobile and persistent qubits
 In ISCA ’07
, 2007
"... In recent years, quantum computing (QC) research has moved from the realm of theoretical physics and mathematics into real implementations [9]. With many different potential hardware implementations, quantum computer architecture is a rich field with an opportunity to solve interesting new problems ..."
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Cited by 5 (2 self)
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In recent years, quantum computing (QC) research has moved from the realm of theoretical physics and mathematics into real implementations [9]. With many different potential hardware implementations, quantum computer architecture is a rich field with an opportunity to solve interesting new problems and to revisit old ones. This paper presents a QC architecture tailored to physical implementations with highly mobile and persistent quantum bits (qubits). Implementations with qubit coherency times that are much longer than operation times and qubit transportation times that are orders of magnitude faster than operation times lend greater flexibility to the architecture. This is particularly true in the placement and locality of individual qubits. For concreteness, we assume a physical device model based on electronspin qubits on liquid helium (eSHe) [15]. Like many conventional computer architectures, QCs focus on the efficient exposure of parallelism. We present here a QC microarchitecture that enjoys increasing computational parallelism with size and latency scaling only linearly with the number of operations. Although an efficient and high level of parallelism is admirable, quantum hardware is still expensive and difficult to build, so we demonstrate how the software may be optimized to reduce an application’s hardware requirements by 25 % with no performance loss. Because the majority of a QC’s time and resources are devoted to quantum error correction, we also present noise modeling results that evaluate error correction procedures. These results demonstrate that idle qubits in memory need only be refreshed approximately once every one hundred operation cycles.
Logic synthesis for faulttolerant quantum computers. arXiv preprint arXiv:1310.7290
, 2013
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Quantum Switching Networks with Classical Routing
"... Abstract — Flexible distribution of data in the form of quantum bits (qubits) amongst spatially separated entities is an essential component of envisioned scalable quantum computing architectures. Since qubits cannot be copied, this operation of moving qubits can be relatively costly in terms of re ..."
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Abstract — Flexible distribution of data in the form of quantum bits (qubits) amongst spatially separated entities is an essential component of envisioned scalable quantum computing architectures. Since qubits cannot be copied, this operation of moving qubits can be relatively costly in terms of resources. Moreover, implementation of quantum gates requires precise and extensive classical control and computation too. Accordingly, we consider the problem of dynamically permuting groups of qubits, i.e., qubit packets using reconfigurable quantum switches in which routing information is calculated classically as a possible way to reduce this cost. We design a 2 × 2 switch based on the controlledswap quantum gate and show that if switch settings are determined using efficient classical algorithms, then quantum switches can be mapped onto classical nonblocking interconnection switch topologies with low cost by using this switch. Specific quantum switch designs for the optimal Benes ̌ network and the planar SpankeBenes ̌ network are given. I.