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A buffer-sizing algorithm for network-on-chips with multiple voltage-frequency islands
- J. Electrical and Computer Engineering
"... Buffers in on-chip networks constitute a significant proportion of the power consumption and area of the interconnect, and hence reducing them is an important problem. Application-specific designs have nonuniform network utilization, thereby requiring a buffer-sizing approach that tackles the nonun ..."
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Buffers in on-chip networks constitute a significant proportion of the power consumption and area of the interconnect, and hence reducing them is an important problem. Application-specific designs have nonuniform network utilization, thereby requiring a buffer-sizing approach that tackles the nonuniformity. Also, congestion effects that occur during network operation need to be captured when sizing the buffers. Many NoCs are designed to operate in multiple voltage/frequency islands, with interisland communication taking place through frequency converters. To this end, we propose a two-phase algorithm to size the switch buffers in network-on-chips (NoCs) considering support for multiple-frequency islands. Our algorithm considers both the static and dynamic effects when sizing buffers. We analyze the impact of placing frequency converters (FCs) on a link, as well as pack and send units that effectively utilize network bandwidth. Experiments on many realistic system-on-Chip (SoC) benchmark show that our algorithm results in 42% reduction in amount of buffering when compared to a standard buffering approach.
Comparative Performance Analysis of k-Ary n-Cube Topologies with Multiple Virtual Channels and Finite Size Buffers Abstract
"... Comparative performance studies of k-ary n-cubes under different design constraints and operating conditions have been widely reported in the literature. When deterministic routing is used, researchers have shown that under bisection width constraint the torus outperforms the hypercubes while the co ..."
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Comparative performance studies of k-ary n-cubes under different design constraints and operating conditions have been widely reported in the literature. When deterministic routing is used, researchers have shown that under bisection width constraint the torus outperforms the hypercubes while the converse is true when the network is subject to pin-out constraint. However, when adaptive routing is used, it has been shown that the network exhibiting the best performance depends on the network size and the imposed implementation constraints. However, all of these studies have assumed single flit buffers. Deploying finite size buffers, however, may add extra complexity to the router design and hence will influence the cost and the performance of the network. In this research we re-examine the relative performance merits of different k-ary n-cube topologies combining wormhole switching, adaptive routing, multiple virtual channels and finite size buffers. New analytical models that were able to capture the effects of finite buffers and virtual channels along with a cost-performance model have been used in the analyses. The results reveal new insights demonstrating the sensitivity of these studies to the level of detail and realism incorporated in the used analytical models. 1.
Deep versus Parallel Buffers in Wormhole Switched k-Ary n-Cubes Abstract
"... Virtual channels have been introduced to enhance the performance of wormhole-switched networks. They are formed by arranging the buffer space dedicated to a given physical channel into multiple parallel buffers that share the physical bandwidth in a demand driven time-multiplexed manner. There have ..."
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Virtual channels have been introduced to enhance the performance of wormhole-switched networks. They are formed by arranging the buffer space dedicated to a given physical channel into multiple parallel buffers that share the physical bandwidth in a demand driven time-multiplexed manner. There have been few attempts to study the optimal arrangement of virtual channels (i.e. given a fixed amount of finite buffer what is the optimal way to arrange it into virtual channels). However, these studies have so fare resorted to simulation experiments and focused on deterministic routing algorithms. In this paper we use analytical performance models to investigate the optimal arrangement of the available buffer space into multiple virtual channels when adaptive routing is used in wormhole-switched k-ary n-cubes. 1.
