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The Specification and Execution of Heterogenous Synchronous Reactive systems (1997)

by S A Edwards
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Hierarchical Finite State Machines with Multiple Concurrency Models

by Alain Girault, Bilung Lee, Edward A. Lee - IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems , 1999
"... This paper studies the semantics of hierarchical finite state machines (FMS's) that are composed using various concurrency models, particularly dataflow, discrete-events, and synchronous/reactive modeling. It is argued that all three combinations are useful, and that the concurrency model can b ..."
Abstract - Cited by 146 (43 self) - Add to MetaCart
This paper studies the semantics of hierarchical finite state machines (FMS's) that are composed using various concurrency models, particularly dataflow, discrete-events, and synchronous/reactive modeling. It is argued that all three combinations are useful, and that the concurrency model can be selected independently of the decision to use hierarchical FSM's. In contrast, most formalisms that combine FSM's with concurrency models, such as Statecharts (and its variants) and hybrid systems, tightly integrate the FSM semantics with the concurrency semantics. An implementation that supports three combinations is described.
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...ard, in principle. The functions are simply evaluated in any order until we converge to a fixed point. Choosing a good order for evaluating the functions can greatly impact performance, obviously. In =-=[20]-=-, Edwards proposes and compares several algorithms for choosing a good order of evaluation. Functions are allowed to change between ticks. Thus, a module in SR has two distinct behaviors that we call ...

MODELING CONCURRENT REAL-TIME PROCESSES USING DISCRETE EVENTS

by Edward A. Lee , 1997
"... We give a formal framework for studying real-time discrete-event systems. It describes concurrent processes as sets of possible behaviors. Compositions of processes are processes with behaviors in the intersection of the behaviors of the component processes. The interaction between processes is thro ..."
Abstract - Cited by 95 (58 self) - Add to MetaCart
We give a formal framework for studying real-time discrete-event systems. It describes concurrent processes as sets of possible behaviors. Compositions of processes are processes with behaviors in the intersection of the behaviors of the component processes. The interaction between processes is through signals, which are collections of events. Each event is a value-tag pair, where the tags denote time. Zeno conditions are defined and methods are given for avoiding them. Strict causality ensures determinacy under certain technical conditions, and delta-causality ensures the absence of Zeno conditions.

Heterogeneous Concurrent Modeling and Design in Java (Volumes 1: Introduction to Ptolemy II)

by Christopher Brooks, Edward A. Lee, Xiaojun Liu, Yang Zhao, Haiyang Zheng, et al. , 2005
"... ..."
Abstract - Cited by 69 (16 self) - Add to MetaCart
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Embedded Software

by Edward A. Lee - Advances in Computers , 2002
"... The science of computation has systematically abstracted away the physical world. Embedded software systems, however, engage the physical world. Time, concurrency, liveness, robustness, continuums, reactivity, and resource management must be remarried to computation. Prevailing abstractions of compu ..."
Abstract - Cited by 63 (7 self) - Add to MetaCart
The science of computation has systematically abstracted away the physical world. Embedded software systems, however, engage the physical world. Time, concurrency, liveness, robustness, continuums, reactivity, and resource management must be remarried to computation. Prevailing abstractions of computational systems leave out these "non-functional" aspects. This chapter explains why embedded software is not just software on small computers, and why it therefore needs fundamentally new views of computation. It suggests component architectures based on a principle called "actor-oriented design," where actors interact according to a model of computation, and describes some models of computation that are suitable for embedded software. It then suggests that actors can define interfaces that declare dynamic aspects that are essential to embedded software, such as temporal properties. These interfaces can be structured in a "system-level type system" that supports the sort of design-time and run-time type checking that conventional software benefits from.
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...int semantics, meaning that in each iteration, the domain may repeatedly fire the components until a fixed point is found. Two such domains are continuous time (CT) [66] and synchronous/reactive (SR) =-=[24]-=-[88]. The fact that a state update is committed only in the postfire phase of an iteration makes it easy to use domain-polymorphic components in such a domain. Ptolemy II also has domains for which th...

Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation

by Wei Qin, S. Malik - Design, Automation and Test in Europe Conference and Exhibition , 2003
"... Given the growth in application-specific processors, there is a strong need for a retargetable modeling framework that is capable of accurately capturing complex processor behaviors and generating efficient simulators. We propose the operation state machine (OSM) computation model to serve as the fo ..."
Abstract - Cited by 48 (5 self) - Add to MetaCart
Given the growth in application-specific processors, there is a strong need for a retargetable modeling framework that is capable of accurately capturing complex processor behaviors and generating efficient simulators. We propose the operation state machine (OSM) computation model to serve as the foundation of such a modeling framework. The OSM model separates the processor into two interacting layers: the operation layer where operation semantics and timing are modeled, and the hardware layer where disciplined hardware units interact. This declarative model allows for direct synthesis of micro-architecture simulators as it encapsulates precise concurrency semantics of microprocessors. We illustrate the practical benefits of this model through two case studies- the StrongARM core and the PowerPC-750 superscalar processor. The experimental results demonstrate that the OSM model has excellent modeling productivity and model efficiency. Additional applications of this modeling framework include derivation of information required by compilers and formal analysis for processor validation.
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...ven simulation, which specializes the DE domain by aligning all events on clock boundaries, thus providing faster simulation speed. Liberty [20] is based on the heterogeneous synchronous-reactive MOC =-=[6]-=- and allows for intracycle communication. Both Asim and Liberty emphasize clean structuring of the modules and their interfaces to enable reuse. In these hardware-centric frameworks, hardware executio...

Exploiting parallelism and structure to accelerate the simulation of chip multi-processors

by David A. Penry, Daniel Fay, David Hodgdon, Ryan Wells, Graham Schelle, David I. August, Dan Connors - in Proc. of the Twelfth Int. Symp. on High-Performance Computer Architecture , 2006
"... Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulators. CMP simulation speed can be improved by exploiting parallelism in the CMP simulation model. This may be done by eithe ..."
Abstract - Cited by 41 (6 self) - Add to MetaCart
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulators. CMP simulation speed can be improved by exploiting parallelism in the CMP simulation model. This may be done by either running the simulation on multiple processors or by integrating multiple processors into the simulation to replace simulated processors. Doing so usually requires tedious manual parallelization or re-design to encapsulate processors. Both problems can be avoided by generating the simulator from a concurrent, structural model of the CMP. Such a model not only resembles hardware, making it easy to understand and use, but also provides sufficient information to automatically parallelize the simulator without requiring manual model changes. Furthermore, individual components of the model such as processors may be replaced with equivalent hardware without requiring repartitioning. This paper presents techniques to perform automated simulator parallelization and hardware integration for CMP structural models. We show that automated parallelization can achieve an 7.60 speedup for a 16-processor CMP model on a conventional 4-processor shared-memory multiprocessor. We demonstrate the power of hardware integration by integrating eight hardware PowerPC cores into a CMP model, achieving a speedup of up to 5.82. 1.
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...on order that obeys a formal model of computation defining the semantics of communication and concurrent execution. The model used by LSE is known as the Heterogeneous Synchronous Reactive (HSR) model=-=[7]-=-. While the details are beyond the scope of this paper, it is possible to create a static execution schedule of method invocations (possibly repeating some invocations) which guarantees that the colle...

An Extensible Type System for Component-Based Design

by Yuhong Xiong, Edward A. Lee , 2002
"... Abstract. We present the design and implementation of the type system for Ptolemy II, which is a tool for component-based heterogeneous modeling and design. This type system combines static typing with run-time type checking. It supports polymorphic typing of components, and allows automatic lossles ..."
Abstract - Cited by 41 (10 self) - Add to MetaCart
Abstract. We present the design and implementation of the type system for Ptolemy II, which is a tool for component-based heterogeneous modeling and design. This type system combines static typing with run-time type checking. It supports polymorphic typing of components, and allows automatic lossless type conversion at run-time. To achieve this, we use a lattice to model the lossless type conversion relation among types, and use inequalities defined over the type lattice to specify type constraints in components and across components. The system of inequalities can be solved efficiently, with existence and uniqueness of a solution guaranteed by fixed-point theorems. This type system increases the safety and flexibility of the design environment, promotes component reuse, and helps simplify component development and optimization. The infrastructure we have built is generic in that it is not bound to one particular type lattice. The type system can be extended in two ways: by adding more types to the lattice, or by using different lattices to model different system properties. Higher-order function types and extended types can be accommodated in this way. 1
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...d point of a continuous function on a CPO. The elements of the CPO are functions that map one state to another. In concurrent programming models, the process network [58] and the synchronous reactive =-=[39]-=- models also have fixed point semantics. Fixed point theorems are handy in dealing with “circular systems”, such as the while construct in general purpose languages, and circular graphs in PN and SR. ...

Automatic distribution of reactive systems for asynchronous networks of processors

by Paul Caspi, Alain Girault, Daniel Pilaud - IEEE Transactions on Software Engineering , 1999
"... Abstract—This paper addresses the problem of automatically distributing reactive systems. We first show that the use of synchronous languages allows a natural parallel description of such systems, regardless of any distribution problems. Then, a desired distribution can be easily specified, and achi ..."
Abstract - Cited by 32 (7 self) - Add to MetaCart
Abstract—This paper addresses the problem of automatically distributing reactive systems. We first show that the use of synchronous languages allows a natural parallel description of such systems, regardless of any distribution problems. Then, a desired distribution can be easily specified, and achieved with the algorithm presented here. This distribution technique provides distributed programs with the same safety, test, and debug facilities as ordinary sequential programs. Finally, the implementation of such distributed programs only requires a very simple communication protocol (“first in first out ” queues), thereby reducing the need for large distributed real-time executives. Index Terms—Asynchronous communications, distributed processing, reactive systems, automatic distribution, synchronous languages. ————————— — F ——————————
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...the system reaction to an input. There are numerous languages based upon the synchrony hypothesis: ESTEREL [5], LUSTRE [15], SIGNAL [20], STATECHARTS [17], SML [6], SYNCCHARTS [2], ARGOS [22], and SR =-=[13]-=-. Research on synchronous languages compilation has led to the Object Code (OC) encoding format for automata. It is the output format of the ESTEREL, LUSTRE, and ARGOS compilers [23]. For a better und...

The RTDEVS/CORBA Environment for Simulation-Based Design Of Distributed Real-Time Systems, Simulation: Transactions of The Society for Modeling and Simulation

by Young K. Cho, Xiaolin Hu, Bernard P. Zeigler - International, 2003, Volume 79, Number 4 , 2003
"... The increasing complexity of large-scale distributed real time systems demands powerful real time object computing technologies. Furthermore, systematic design approaches are needed to support analysis, design, test, and implementation of these systems. In this paper, we discuss RTDEVS/CORBA, an imp ..."
Abstract - Cited by 24 (8 self) - Add to MetaCart
The increasing complexity of large-scale distributed real time systems demands powerful real time object computing technologies. Furthermore, systematic design approaches are needed to support analysis, design, test, and implementation of these systems. In this paper, we discuss RTDEVS/CORBA, an implementation of DEVS modeling and simulation theory based on real time CORBA communication middleware. With RTDEVS/CORBA, the software model of a complex distributed real time system can be designed and then tested in a virtual testing environment and finally executed in a real distributed environment. This model continuity and simulation-based design approach effectively manages software complexity and consistency problems for complex systems and increases the flexibility for test configurations as well as reduces the time and cost for testing. In the paper, the layered architecture and different implementation issues of RTDEVS/CORBA are studied and discussed. An example application is then given to show how RTDEVS/CORBA supports a framework for model continuity in distributed real time modeling and simulation.
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...[17]. Current projects include PORTS: A Parallel, Optimistic, Real-Time Simulation [5], OPERA (Operators Training Distributed Real-Time Simulation) [7], Ptolemy (Concurrent Discrete Event Simulation) =-=[8,9]-=-, Time-triggered Message-triggered Object (TMO) based Distributed Real-Time System Development Environment [10,11], and Cluster Simulation – Support for Distributed Development of Hard Real-Time Syste...

Optimizations for a simulator construction system supporting reusable components

by David A. Penry, David I. August - In Proceedings of the 40th Design Automation Conference , 2003
"... Exploring a large portion of the microprocessor design space requires the rapid development of efficient simulators. While some systems support rapid model development through the structural composition of reusable concurrent components, the Liberty Simulation Environment (LSE) provides addi-tional ..."
Abstract - Cited by 23 (10 self) - Add to MetaCart
Exploring a large portion of the microprocessor design space requires the rapid development of efficient simulators. While some systems support rapid model development through the structural composition of reusable concurrent components, the Liberty Simulation Environment (LSE) provides addi-tional reuse-enhancing features. This paper evaluates the cost of these features and presents optimizations to reduce their impact. With these optimizations, an LSE model using reusable components outperforms a SystemC model using custom components by 6%.
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...rlying model of computation of LSE is also dierent. Verilog, VHDL, and SystemC all use a Discrete-Event (DE) model. LSE uses the Heterogeneous Synchronous Reactive (HSR) model proposed by Edwards in [=-=4]-=-. This model is an extension of the Synchronous Reactive model (used in languages such as Esterel[1]) for situations where the precise input-to-output datasow of blocks of code are unknown (such as wh...

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