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VLIW Processor Codesign for Video Processing
- University of California, Berkeley, in
, 1997
"... . A codesign approach for complex video compression systems is presented. The system is based on a flexible and programmable VLIW (Very Long Instruction Word) architecture. The design approach can be subdivided into two phases: a quantitative analysis for deriving the main processor structure and a ..."
Abstract
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Cited by 3 (0 self)
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. A codesign approach for complex video compression systems is presented. The system is based on a flexible and programmable VLIW (Very Long Instruction Word) architecture. The design approach can be subdivided into two phases: a quantitative analysis for deriving the main processor structure and a cosynthesis for generating the processor hardware and the compiler back-end. The analysis results of different video compression algorithms are summarized. This permits to adapt the processor to a set of related applications rather than to a particular task. A compiled instruction-set simulator for analyzing large data sets is presented. An HTML-based codesign framework is shown which documents and organizes the analysis data. Keywords: Embedded system design, video processing, VLIW processors, performance analysis 1. Introduction A short-time-to market, improvements of design productivity, and a trend towards evermore complex systems are the main motivations for the recent interest in desi...
HW/SW co-synthesis using CASTLE
"... Abstract: CASTLE is a co-design platform developed at GMD SET institute. It provides a number of design tools for configuring application specific design flows. This paper presents a walk through the CASTLE co-design environment, following the design flow of a video processing system. The design met ..."
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Abstract: CASTLE is a co-design platform developed at GMD SET institute. It provides a number of design tools for configuring application specific design flows. This paper presents a walk through the CASTLE co-design environment, following the design flow of a video processing system. The design methodology and the tool usage for this real life example are described, as seen from a designers point of view. The design flow starts with a C/C++ program and gradually derives a register-transfer level description of a processor hardware, as well as the corresponding compiler for generating the processor opcode. The main results of each design step are presented and the usage of the CASTLE tools at each step is explained. 1

