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49
Verifying Analog Oscillator Circuits Using Forward/Backward Abstraction Refinement
 In DATE 2006: Design, Automation and Test in Europe
, 2006
"... Properties of analog circuits can be verified formally by partitioning the continuous state space and applying hybrid system verification techniques to the resulting abstraction. To verify properties of oscillator circuits, cyclic invariants need to be computed. Methods based on forward reachability ..."
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Cited by 42 (1 self)
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Properties of analog circuits can be verified formally by partitioning the continuous state space and applying hybrid system verification techniques to the resulting abstraction. To verify properties of oscillator circuits, cyclic invariants need to be computed. Methods based on forward reachability have proven to be inefficient and in some cases inadequate in constructing these invariant sets. In this paper we propose a novel approach combining forward and backwardreachability while iteratively refining partitions at each step. The technique can yield dramatic memory and runtime reductions. We illustrate the effectiveness by verifying, for the first time, the limit cycle oscillation behavior of a thirdorder model of a differential VCO circuit. 1.
Statistical model checking: An overview
 RV 2010
, 2010
"... Quantitative properties of stochastic systems are usually specified in logics that allow one to compare the measure of executions satisfying certain temporal properties with thresholds. The model checking problem for stochastic systems with respect to such logics is typically solved by a numerical a ..."
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Cited by 29 (6 self)
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Quantitative properties of stochastic systems are usually specified in logics that allow one to compare the measure of executions satisfying certain temporal properties with thresholds. The model checking problem for stochastic systems with respect to such logics is typically solved by a numerical approach [31,8,35,22,21,5] that iteratively computes (or approximates) the exact measure of paths satisfying relevant subformulas; the algorithms themselves depend on the class of systems being analyzed as well as the logic used for specifying the properties. Another approach to solve the model checking problem is to simulate the system for finitely many executions, and use hypothesis testing to infer whether the samples provide a statistical evidence for the satisfaction or violation of the specification. In this tutorial, we survey the statistical approach, and outline its main advantages in terms of efficiency, uniformity, and simplicity.
Verification of analog/mixedsignal circuits using labeled hybrid petri nets
 IN: PROC. OF ICCAD
, 2006
"... System on a chip design results in the integration of digital, analog, and mixedsignal circuits on the same substrate which further complicates the already difficult validation problem. This paper presents a new model, labeled hybrid Petri nets (LHPNs), that is developed to be capable of modeling s ..."
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Cited by 24 (10 self)
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System on a chip design results in the integration of digital, analog, and mixedsignal circuits on the same substrate which further complicates the already difficult validation problem. This paper presents a new model, labeled hybrid Petri nets (LHPNs), that is developed to be capable of modeling such a heterogeneous set of components. This paper also describes a compiler from VHDLAMS to LHPNs. To support formal verification, this paper presents an efficient zonebased state space exploration algorithm for LHPNs. This algorithm uses a process known as warping to allow zones to describe continuous variables that may be changing at variable rates. Finally, this paper describes the application of this algorithm to a couple of analog/mixedsignal circuit examples.
Analog/MixedSignal Circuit Verification Using Models Generated from Simulation Traces ⋆
"... Abstract. Formal and semiformal verification of analog/mixedsignal circuits is complicated by the difficulty of obtaining circuit models suitable for analysis. We propose a method to generate a formal model from simulation traces. The resulting model is conservative in that it includes all of the ..."
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Cited by 22 (6 self)
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Abstract. Formal and semiformal verification of analog/mixedsignal circuits is complicated by the difficulty of obtaining circuit models suitable for analysis. We propose a method to generate a formal model from simulation traces. The resulting model is conservative in that it includes all of the original simulation traces used to generate it plus additional behavior. Information obtained during the model generation process can also be used to refine the simulation and verification process. 1
Probabilistic Temporal Logic Falsification of CyberPhysical Systems
"... We present a MonteCarlo optimization technique for finding system behaviors that falsify a Metric Temporal Logic (MTL) property. Our approach performs a random walk over the space of system inputs guided by a robustness metric defined by the MTL property. Robustness is guiding the search for a fals ..."
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Cited by 14 (12 self)
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We present a MonteCarlo optimization technique for finding system behaviors that falsify a Metric Temporal Logic (MTL) property. Our approach performs a random walk over the space of system inputs guided by a robustness metric defined by the MTL property. Robustness is guiding the search for a falsifying behavior by exploring trajectories with smaller robustness values. The resulting testing framework can be applied to a wide class of CyberPhysical Systems (CPS). We show through experiments on complex system models that using our framework can help automatically falsify properties with more consistency as compared to other means such as uniform sampling.
Fainekos, “Falsification of temporal properties of hybrid systems using the crossentropy method
 in HSCC. ACM
"... Randomized testing is a popular approach for checking properties of large embedded system designs. It is well known that a uniform random choice of test inputs is often suboptimal. Ideally, the choice of inputs has to be guided by choosing the right input distributions in order to expose cornercas ..."
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Cited by 12 (5 self)
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Randomized testing is a popular approach for checking properties of large embedded system designs. It is well known that a uniform random choice of test inputs is often suboptimal. Ideally, the choice of inputs has to be guided by choosing the right input distributions in order to expose cornercase violations. However, this is also known to be a hard problem, in practice. In this paper, we present an application of the crossentropy method for adaptively choosing input distributions for falsifying temporal logic properties of hybrid systems. We present various choices for representing input distribution families for the crossentropy method, ranging from a complete partitioning of the input space into cells to a factored distribution of the input using graphical models. Finally, we experimentally compare the falsification approach using the crossentropy method to other stochastic and heuristic optimization techniques implemented inside the tool STaliro over a set of benchmark systems. The performance of the cross entropy method is quite promising. We find that sampling inputs using the crossentropy method guided by trace robustness can discover violations faster, and more consistently than the other competing methods considered.
Combining symbolic simulation and interval arithmetic for the verification of AMS designs
 in: IEEE International Conference on Formal Methods in ComputerAided Design, 2007
"... Abstract—Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recently, several formal techniques have been introduced for AMS verification. In this paper, we propose a difference equation ..."
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Cited by 10 (2 self)
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Abstract—Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recently, several formal techniques have been introduced for AMS verification. In this paper, we propose a difference equations based bounded model checking approach for AMS systems. We define model checking using a combined system of difference equations for both the analog and digital parts, where the state space exploration algorithm is handled with Taylor approximations over interval domains. We illustrate our approach on the verification of several AMS designs including ∆Σ modulator and oscillator circuits. I.
Formal verification of phase locked loops using reachability analysis and continuization,”
 in Proceedings of the IEEE/ACM International Conference on ComputerAided Design (ICCAD),
, 2011
"... Abstract We present a scalable and formal technique to verify locking time and stability for chargepump phaselocked loops (PLLs). In contrast to the traditional simulation approach that only validates the PLL at a given operation condition, our proposed technique formally verified the PLL at all ..."
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Cited by 9 (3 self)
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Abstract We present a scalable and formal technique to verify locking time and stability for chargepump phaselocked loops (PLLs). In contrast to the traditional simulation approach that only validates the PLL at a given operation condition, our proposed technique formally verified the PLL at all possible operation conditions. The dynamics of the PLL is described by a hybrid automaton, which incorporates the differential equations of the analog circuit elements as well as the switching logic of the digital circuit elements. Existing methods for computing reachable sets for hybrid automata cannot be used to verify the PLL model due to the large number of cycles required for locking. We develop a new method for computing effective overapproximations of the sets of states reached on each cycle by using uncertain parameters in a discretetime model to represent the range of possible switching times, a technique we call continuization. Using this new method for reachability analysis, it is possible to verify locking specifications for a chargepump PLL design for all possible initial states and parameter values in time comparable to the time required for a few simulation runs of the same behavioral model. intRoDuCtion In the standard design flow for analog mixed signal (AMS) circuits, the complete circuit is decomposed into its principal elements or blocks, which are first analyzed and designed using idealized loworder behavioral models. Detailed circuitlevel designs are implemented only after the performance specifications have been verified at the block level over the required range of parameter variations and operating conditions. The goal is to create robust designs to avoid costly redesign cycles in the downstream process. Because of the complexity of the mixed continuous and discrete (i.e., hybrid) AMS dynamics, there are no analytical techniques to verify a given design satisfies the circuit specifications, even for the simplified blocklevel behavioral models. Thus, numerical simulation has been the standard tool for evaluating the performance of behavioral models. Simulation is not completely satisfactory, however, because each simulation run represents the behavior for only one set of values for the initial states and parameters, so many simulations are required to assess the robustness of the design. Moreover, some specifications can be verified only after simulations have run for very long durations, and some specifications such
Time domain verification of oscillator circuit properties
 Workshop on Formal Verification of Analog Circuits, FAC’05
, 2005
"... The application of formal methods to analog and mixed signal circuits requires efficient methods for constructing abstractions of circuit behaviors. This paper concerns the verification of properties of oscillator circuits. Generic monitor automata are proposed to facilitate the application of hybri ..."
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Cited by 9 (0 self)
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The application of formal methods to analog and mixed signal circuits requires efficient methods for constructing abstractions of circuit behaviors. This paper concerns the verification of properties of oscillator circuits. Generic monitor automata are proposed to facilitate the application of hybrid system reachability computations to characterize time domain features of oscillatory behavior, such as bounds on the signal amplitude and jitter. The approach is illustrated for a nonlinear tunneldiode circuit model using PHAVer, a hybrid system analysis tool that provides sound verification results based on linear hybrid automata approximations and infinite precision computations. Key words: verification, oscillators, analog circuits, hybrid systems, hybrid automata 1