Many compilers rely on branch prediction to improve program performance by identifying frequently executed regions and by aiding in scheduling instructions. Profile-based predictors require a time-consuming and inconvenient compile-profile-compile cycle in order to make predictions. We present a program-based branch predictor that performs well for a large and diverse set of programs written in C and Fortran. In addition to using natural loop analysis to predict branches that control the iteration of loops, we focus on heuristics for predicting non-loop branches, which dominate the dynamic branch count of many programs. The heuristics are simple and require little program analysis, yet they are effective in terms of coverage and miss rate. Although program-based prediction does not equal the accuracy of profile-based prediction, we believe it reaches a sufficiently high level to be useful. Additional type and semantic information available to a compiler would enhance our heuristics. #...

Pipelining has become a common technique to increase throughput of the instruction fetch, instruction decode, and instruction execution portions of modern computers. Branch instructions disrupt the flow of instructions through the the pipeline, increasing the overall execution cost of branch instructions. Three schemes to reduce the cost of branches are presented in the context of a general pipeline model. Ten realistic Unix domain programs are used to directly compare the cost and performance of the three schemes and the results are in favor of the software-based scheme. For example, the software-based scheme has a cost of 1.65 cycles/branch vs. a cost of 1.68 cycles/branch of the best hardware scheme for a highly pipelined processor (11-stage pipeline). The results are 1.19 (software scheme) vs. 1.23 cycles/branch (best hardware scheme) for a moderately pipelined processor (5stage pipeline). 1 Introduction The pipelining of modern computer designs causes problems for the execution o...

Compile-time code transformations which expose instruction-level parallelism (ILP) typically take into account the constraints imposed byallexecution scenarios in the program. However, there areaddi tional opportunities to increase ILP along some execution sequences if the constraints from alternative execution sequences can be ignored. Traditionally, pro le information has been used to identify important execution sequences for aggressive compiler optimization and scheduling. This paper presents a set of static program analysis heuristics used in the IMPACT compiler to identify execution sequences for aggressive optimization. We show that the static program analysis heuristics identify execution sequences without hazardous conditions that tend to prohibit compiler optimizations. As a result, the static program analysis approach often achieves optimization results comparable to pro le information in spite of its inferior branch prediction accuracies. This observation makes a strong case for using static program analysis with or without pro le information to facilitate aggressive compiler optimization and scheduling.

An ILP (Instruction-Level Parallelism) compiler uses aggressive optimizations to reduce a program's running time. These optimizations have been shown to be effective when profile information is available. Unfortunately, users are not always willing or able to profile their programs. A method of overcoming this issue is for an ILP compiler to statically infer the information normally obtained from profiling. This paper investigates one aspect of this inference: the static prediction of conditional-branch direction. The goals of this work are to utilize the source-level information available in a compiler when performing static branch prediction, to identify static-branch-prediction cases in which there is a high confidence that a branch will go in one direction at run time, to gain an intuitive understanding into the reasons why the static-branch-prediction heuristics are effective, and ultimately to improve the accuracy of the static branch prediction. The effectiveness of the static-b...

The ability to predict the directions of branches, especially conditional branches,

The performance degradation caused by branch instructions in pipelined computers is well known. The degradation is even greater on computers with multiple pipelines processing a single instruction stream, such as superscalar and scalable compound instruction-set machines (SCISM). Several branch prediction schemes have been proposed that attempt to reduce this performance penalty. One of these -- dynamic prediction of branch outcomes by tagging instructions in an instruction cache with prediction information -- is adapted to an IBM ESA/370 SCISM implementation with several important additions. The adaptation may be extended to other architectures with similar characteristics. More significantly, a scheme is developed that allows the predominant IBM ESA/370 branch instructions to be removed from the instruction stream. These instructions, in effect, execute in zero time when the prediction is correct, thereby significantly increasing the performance achieved by the base SCISM machine org...