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ATPG for Scan Chain Latches and Flip-Flops
, 1997
"... A new approach for testing the bistable elements (latches and flip-flops) in scan chain circuits is presented. In this approach, we generate test patterns that apply a checking experiment to each bistable element in the circuit while checking their response. Such tests guarantee the detection of all ..."
Abstract
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Cited by 4 (2 self)
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A new approach for testing the bistable elements (latches and flip-flops) in scan chain circuits is presented. In this approach, we generate test patterns that apply a checking experiment to each bistable element in the circuit while checking their response. Such tests guarantee the detection of all detectable combinational defects inside the bistable elements. The algorithm is implemented by modifying an existing stuck-at combinational test pattern generator. The number of test patterns generated by the new program is comparable to the number of traditional stuck-at patterns. This shows that this approach is practical for large circuits. 1. Introduction Scan was introduced to overcome the difficulties of sequential test generation [1], [2]. The basic idea of scan is to allow easy access to the flip-flops in the design so that test patterns can be applied directly to the inputs of the internal combinational logic, and the outputs of the internal combinational logic can be "captured" ...
Checking Experiments for Scan Chain Latches and Flip-Flops
, 1996
"... All rights reserved, including the right to reproduce this report, or portions thereof, in any form. New digital designs often include scan chains; high quality economical test is the reason. A scan chain allows easy access to internal combinational logic by converting bistable elements, latches and ..."
Abstract
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Cited by 3 (2 self)
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All rights reserved, including the right to reproduce this report, or portions thereof, in any form. New digital designs often include scan chains; high quality economical test is the reason. A scan chain allows easy access to internal combinational logic by converting bistable elements, latches and flip-flops, into a shift register. Test patterns are scanned in, applied to the internal circuitry, and the results are scanned out for comparison. While many techniques exist for testing the combinational circuitry, little attention has been paid to testing the bistable elements themselves. The bistable elements are typically tested by shifting in a sequence of zeroes and ones. This test can miss many defects inside the bistable elements. A checking experiment is a sequence of inputs and outputs that contains enough information to extract the functionality of the circuit. A new approach, based on such sequences, can significantly reduce the number of defects missed. Simulation results show that as many as 20 percent of the faults in bistable elements can be missed by typical tests; essentially all of these missed faults are detected by checking experiments. Since the checking experiment is a functional test, it is

