Results 1 - 10
of
49
Estimation of Standby Leakage Power in CMOS Circuits Considering Accurate Modeling of Transistor Stacks
, 1998
"... Low supply voltage requires the device threshold to be reduced in order to maintain performance. Due to the exponential relationship between leakage current and threshold voltage in the weak inversion region, leakage power can be no longer negligible in such circuits. In this paper we present a tech ..."
Abstract
-
Cited by 88 (3 self)
- Add to MetaCart
Low supply voltage requires the device threshold to be reduced in order to maintain performance. Due to the exponential relationship between leakage current and threshold voltage in the weak inversion region, leakage power can be no longer negligible in such circuits. In this paper we present a technique to accurately estimate leakage power by accurately modeling the leakage current in transistor stacks. The standby leakage current model has been verified by HSPICE. We demonstrate that the dependence of leakage power on primary input combinations can be accounted for by this model. Based on our analysis we can determine good bounds for leakage power in the standby mode. As a by-product of this analysis, we can also determine the set of input vectors which can put the circuits in the low-power standby mode. Results on a large number of benchmarks indicate that proper input selection can reduce the standby leakage power by more than 50% for some circuits. I. Introduction The increasing ...
Efficient Power Estimation for Highly Correlated Input Streams
- in Proc. ACM/IEEE Design Automation Conference
, 1995
"... Abstract- Power estimation in combinational modules is addressed from a probabilistic point of view. The zero-delay hypothesis is considered and under highly correlated input streams, the activities at the primary outputs and all internal nodes are estimated. For the first time, the relationship bet ..."
Abstract
-
Cited by 59 (20 self)
- Add to MetaCart
(Show Context)
Abstract- Power estimation in combinational modules is addressed from a probabilistic point of view. The zero-delay hypothesis is considered and under highly correlated input streams, the activities at the primary outputs and all internal nodes are estimated. For the first time, the relationship between logic and probabilistic domains is investigated and two new concepts- conditional independence and isotropy of signals- are brought into attention. Based on them, a sufficient condition for analyzing complex dependencies is given. In the most general case, the conditional independence problem has been shown to be NP-complete and thus appropriate heuristics are presented to estimate switching activity. Detailed experiments demonstrate the accuracy and efficiency of the method. The results reported here are useful in low power design. I.
Information theoretic measures for energy consumption at the register-transfer level
- in Proc. Int. Symp. Low Power Design
, 1995
"... Abstract- The problem of estimating the energy consumption at register transfer level is addressed from an information theoretical point of view. It is shown that the average switching activity can be predicted without simulation using either entropy or informational energy averages. Consequently, t ..."
Abstract
-
Cited by 50 (6 self)
- Add to MetaCart
(Show Context)
Abstract- The problem of estimating the energy consumption at register transfer level is addressed from an information theoretical point of view. It is shown that the average switching activity can be predicted without simulation using either entropy or informational energy averages. Consequently, two new measures relying on these concepts are developed. The accuracy of these models is investigated using common benchmarks and the results are promising. I.
Gate-level Power Estimation Using Tagged Probabilistic Simulation
"... In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the notion of tagged (probability) waveforms, which model the set of all possible events at the output of each circuit node. Tagg ..."
Abstract
-
Cited by 42 (1 self)
- Add to MetaCart
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the notion of tagged (probability) waveforms, which model the set of all possible events at the output of each circuit node. Tagged waveforms are obtained by partitioning the logic waveform space of a circuit node according to the initial and final values of each logic waveform and compacting all logic waveforms in each partition by a single tagged waveform. From the tagged waveform, one can calculate the switching activity and hence the average power consumption of the circuit node. To improve the efficiency of tagged probabilistic simulation, only tagged waveforms at the circuit inputs are exactly computed. The tagged waveforms of the remaining nodes are computed using a compositional scheme that propagates the tagged waveforms from circuit inputs to circuit outputs. We obtain significant speed up over explicit simulation methods with an average error of only 6%. This also represents a factor of 2-3 improvement in accuracy of power estimates over previous probabilistic simulation approaches.
Probabilistic Modeling of Dependencies During Switching Activity Analysis
, 1998
"... This paper addresses, from a probabilistic point of view, the issue of switching activity estimation in combinational circuits under the zero-delay model. As the main theoretical contribution, we extend the previous work done on switching activity estimation to explicitly account for complex spatiot ..."
Abstract
-
Cited by 34 (6 self)
- Add to MetaCart
(Show Context)
This paper addresses, from a probabilistic point of view, the issue of switching activity estimation in combinational circuits under the zero-delay model. As the main theoretical contribution, we extend the previous work done on switching activity estimation to explicitly account for complex spatiotemporal correlations which occur at the primary inputs when the target circuit receives data from real application. More precisely, using lag-one Markov Chains, two new concepts - conditional independence and signal isotropy - are brought into attention and based on them, sufficient conditions for exact analysis of complex dependencies are given. From a practical point of view, it is shown that the relative error in calculating the switching activity of a logic gate using only pairwise probabilities can be upper-bounded. It is proved that the conditional independence problem is NP-complete and thus, relying on the concept of signal isotropy, approximate techniques with bounded error are proposed for estimating the switching activity. Evaluations of the model and a comparative analysis on benchmark circuits show that node-by-node switching activities are strongly pattern dependent and therefore, accounting for spatiotemporal dependencies is mandatory if accuracy is a major concern.
Power Estimation Techniques for Integrated Circuits
, 1995
"... With the advent of portable and high-density microelectronic devices, the power dissipation of very large scale integrated (VLSI) circuits is becoming a critical concern. Accurate and eficient power estimation during the design phase is required in order to meet the power specifications without a co ..."
Abstract
-
Cited by 21 (0 self)
- Add to MetaCart
(Show Context)
With the advent of portable and high-density microelectronic devices, the power dissipation of very large scale integrated (VLSI) circuits is becoming a critical concern. Accurate and eficient power estimation during the design phase is required in order to meet the power specifications without a costly redesign process. Recently, a variety of power estimation techniques have been proposed, most of which are based on: I the use of simplified delay models, and 2 modeling t 1 e long-term behavior of logic signals wit I! probabili-ties. The array of available techniques diger in subtle ways in the assumptions that they make, the accuracy that they provide, and the kinds of circuits that they apply to. In this tutorial, I will survey the many power estimation techniques that have been recently proposed and, in an attempt to make sense of all the variety, I will try to explain the diflerent assumptions on which these techniques are based, and the impact of these as-sumptions on their accuracy and speed.
An Interconnect Energy Model Considering Coupling Effects
"... This paper presents an analytical interconnect energy model with consideration of coupling effects, including crosstalk and glitch, which are not adequately considered by the conventional (1 2) model. The energy model introduces a new timescale parameter, called the charge time, which represents ..."
Abstract
-
Cited by 21 (1 self)
- Add to MetaCart
This paper presents an analytical interconnect energy model with consideration of coupling effects, including crosstalk and glitch, which are not adequately considered by the conventional (1 2) model. The energy model introduces a new timescale parameter, called the charge time, which represents the correlation time length between two events and is considered to be the counterpart of the Elmore delay. The authors' energy model is more accurate than the (1 2) model with the same time complexity. Experimental results show that their algorithm is several orders of magnitude faster than HSPICE with less than 5% error. In comparison, the error of the (1 2) model can be as high as 100%. The authors further investigate the relationship between interconnect energy and signal correlation and propose a simplified model, which is even faster than their basic model. This paper also discusses ongoing issues of their model, including stability analysis, event propagation, and resistive shielding effects in interconnect energy calculation.
Analytical Estimation of Signal Transition Activity from Word-Level Statistics
- IEEE Trans. on CAD
, 1997
"... Presented in this paper is a novel methodology to determine the average number of transitions in a signal from its word-level statistical description. The proposed methodology employs: 1.) high-level signal statistics, 2.) a statistical signal generation model, and 3.) the signal encoding (or num ..."
Abstract
-
Cited by 19 (2 self)
- Add to MetaCart
Presented in this paper is a novel methodology to determine the average number of transitions in a signal from its word-level statistical description. The proposed methodology employs: 1.) high-level signal statistics, 2.) a statistical signal generation model, and 3.) the signal encoding (or number representation) to estimate the transition activity for that signal. In particular, the signal statistics employed are mean (t), variance (2), and autocorrelation (p). The signal generation models considered are auto-regressive moving-average (ARMA) models. The signal encoding includes unsigned, one's complement, two's complement, and sign-magnitude representations.
Sequence Compaction for Power Estimation: Theory and Practice
- IEEE TRANSACTIONS ON COMPUTER AIDED DESIGN
, 1999
"... Power estimation has become a critical step in the design of today's integrated circuits (IC's). Power dissipation is strongly input pattern dependent and, hence, to obtain accurate power values one has to simulate the circuit with a large number of vectors that typify the application data ..."
Abstract
-
Cited by 19 (4 self)
- Add to MetaCart
Power estimation has become a critical step in the design of today's integrated circuits (IC's). Power dissipation is strongly input pattern dependent and, hence, to obtain accurate power values one has to simulate the circuit with a large number of vectors that typify the application data. The goal of this paper is to present an effective and robust technique for compacting large sequences of input vectors into much smaller ones such that the power estimates are as accurate as possible and the simulation time is reduced by orders of magnitude. Specifically, this paper introduces the hierarchical modeling of Markov chains as a flexible framework for capturing not only complex spatiotemporal correlations, but also dynamic changes in the sequence characteristics. In addition to this, we introduce and characterize a family of variable-order dynamic Markov models which provide an effective way for accurate modeling of external input sequences that affect the behavior of finite state machines. The new framework is very effective and has a high degree of adaptability. As the experimental results show, large compaction ratios of orders of magnitude can be obtained without significant loss in accuracy (less than 5% on average) for power estimates.
Switching Activity Estimation using Limited Depth Reconvergent Path Analysis
- IN PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN
, 1997
"... ..."
(Show Context)
